15 Nov
2011
15 Nov
'11
7:27 p.m.
Mouse wrote:
Maybe. Depends on what "does not fit" means
here.
[...]
If it means "critical pieces of the design cannot
be implemented in
FPGA at all", then they probably cannot be represented to the
compilation tool either and thus it can't even be aware they exist.
I'm not sure what kind of problem you're trying to describe here. Can
you give an example?
I've found that Verilog can be used to model any digital logic design I
can think of, including a lot of things that can't be done in an FPGA,
and that the synthesizer does a good job of alerting me to that kind of
issue.
VHDL is more expressive in some ways than Verilog, but cannot represent
transmission gates, while Verilog can. However, FPGAs generally don't
have transmission gates exposed to the user, so it isn't a problem for
FPGA design. As far as I know, there is no reasonable logic design
using transmission gates that can't be restructured to use something
else instead. Transmission gates are really a hardware optimization,
and not part of pure digital design.