29 Sep
2001
29 Sep
'01
11:43 a.m.
see below, Plz.
Dick
----- Original Message -----
From: "Tony Duell" <ard(a)p850ug1.demon.co.uk>
To: <classiccmp(a)classiccmp.org>
Sent: Saturday, September 29, 2001 3:48 PM
Subject: Re: ZX81 kits (was Re: Keep or assemble???)
They're more common here, too, but the 64K parts are easier to use once
one's
got one. Once you have the tools, an in-situ-programmable CPLD is probably
adequate for nearly any SBC design, and small ones are just a few bucks, even
The logic on larger SBC's, e.g. the Ferguson Big Board, wouldn't be
difficult to
reduce to another ISP CPLD + a small RAM and a Character Generator EPROM, e.g.
2716, or the like. It wouldn't take much to derive the CPU clock from the video
circuit, since its dot clock would be on the order of 14 MHz or so. If you were
really determinedly minimalist, you would probably use the same oscillator to
drive the disk interface, the video, and the CPU. It might require quite a few
compromises, but ... with today's multi-output PLL's ... If you were totally
determined to use an NTSC- or PAL-compatible monitor, it might be tricky, but if
you use an old PC Mono monitor, and time the video circuitry such that it runs
>
> The trivial way to accomplish this is to use a 64Kx8 SRAM and simply disable
it
when a ROM or
other memory device is selected.
Sure... But 32K*8 SRAMs are more common than 64K ones in the UK, so I'd
probably use a couple of those. And then I'd want to make sure that the
RAM/ROM was only enabled when MREQ was asserted. Not hard, of course.
It's going to be a couple of chips at most, so it's not worth keeping the
ULA just for that...
from places like DigiKey.
>
> Scratch building a system with 64Kx8 SRAM and a 64Kx8 EPROM that copies
itself
> in to the RAM, then disconnects itself, would
take, perhaps an hour or two.
A
video circuit,
with or without an RF modulator, and an FDC might take a mite
longer.
As I've said a couple of times before, I can make a video circuit with
somewhat better capabilities than the ZX81's built-in video (40*25 text,
block grapghics, colour) in 2 or 3 chips. Add another chip or so to
encode the outputs to PAL (although I'd probably prefer to feed the RGB
signals into a TV's SCART socket these days...)
from the 16 MHz that the PC mono circuit uses ... The
FDC can run from that as
well, and the Z80A likes 4 MHz, The Z80H likes 8 ...
-tony