31 Jan
2018
31 Jan
'18
8:47 a.m.
On 01/31/2018 08:00 AM, Paul Koning via cctalk wrote:
Oh, but they cut the IC count in HALF! And, I'll bet,
doubled the power consumption, too. If the F1 didn't have
cache, then they were probably running up against the memory
bandwidth.
Jon
On Jan 31, 2018, at 3:28 AM, Lars Brinkhoff via
cctalk <cctalk at classiccmp.org> wrote:
This document seems to imply that the Super Foonly and the Foonly F1
were separate machines. When I've seen them discussed, they always
seemed to be uses synonymously.
http://www.bitsavers.org/pdf/dec/pdp10/KC10_Jupiter/memos/foonly_19840410.p…
SUPERFOONLY DESIGNED 1968-71
10,000 TTL IC'S
3 MIPS
F1 (1978)
5,000 ECL IC'S
3.5 MIPS
Wow, 10 years later, with faster chips, and still the same speed?
That's surprising.