20 Aug
2021
20 Aug
'21
4:55 a.m.
On Aug 19, 2021, at 7:39 PM, Charles Dickman via
cctalk <cctalk at classiccmp.org> wrote:
There are indications in the KDJ11-B processor spec on bitsavers that the
M8190 could be used in a multiprocessor configuration. For example, bit 10
of the Maintenance Register (17 777 750) is labeled "Multiprocessor Slave"
and indicates that the bus arbitrator is disabled. There is also section
6.6, "Cache Multi-Processor Hooks", that describes cache features that
allow multiprocessor operation.
Interesting.
Would it be as simple as connecting to 11/83 qbus
together? And adding the
proper software.
I would not think so. The processor is the bus controller, and you can't have a bus
with two controllers. It would be a bit like trying to connect a pair of PCs with a PCI
or PCIe jumper cable.
To make these configurations work you need a device in between that arbitrates the actions
of the multiple controllers (PCI people call that a "non-transparent bridge").
paul