19 Aug
2021
19 Aug
'21
4:39 p.m.
There are indications in the KDJ11-B processor spec on bitsavers that the
M8190 could be used in a multiprocessor configuration. For example, bit 10
of the Maintenance Register (17 777 750) is labeled "Multiprocessor Slave"
and indicates that the bus arbitrator is disabled. There is also section
6.6, "Cache Multi-Processor Hooks", that describes cache features that
allow multiprocessor operation.
Would it be as simple as connecting to 11/83 qbus together? And adding the
proper software.
Anybody ever heard of such a thing?
Chuck
20 Aug
20 Aug
4:55 a.m.
On Aug 19, 2021, at 7:39 PM, Charles Dickman via
cctalk <cctalk at classiccmp.org> wrote:
There are indications in the KDJ11-B processor spec on bitsavers that the
M8190 could be used in a multiprocessor configuration. For example, bit 10
of the Maintenance Register (17 777 750) is labeled "Multiprocessor Slave"
and indicates that the bus arbitrator is disabled. There is also section
6.6, "Cache Multi-Processor Hooks", that describes cache features that
allow multiprocessor operation.
Interesting.
Would it be as simple as connecting to 11/83 qbus
together? And adding the
proper software.
I would not think so. The processor is the bus controller, and you can't have a bus
with two controllers. It would be a bit like trying to connect a pair of PCs with a PCI
or PCIe jumper cable.
To make these configurations work you need a device in between that arbitrates the actions
of the multiple controllers (PCI people call that a "non-transparent bridge").
paul
24 Aug
24 Aug
10 a.m.
On Fri, Aug 20, 2021 at 7:55 AM Paul Koning <paulkoning at comcast.net> wrote:
On Aug 19, 2021, at 7:39 PM, Charles Dickman via
cctalk <
cctalk at classiccmp.org> wrote:
There are indications in the KDJ11-B processor spec on bitsavers that the
M8190 could be used in a multiprocessor configuration. For example, bit
10
of the Maintenance Register (17 777 750) is
labeled "Multiprocessor
Slave"
and indicates that the bus arbitrator is
disabled.
Interesting.
Understood, but the processor spec indicates that it should be possible to
turn off the local arbitrator, so the processor at one end would have its
arbitrator on and the processor at the other end would have the arbitrator
turned off.
Would it be as simple as connecting to 11/83 qbus
together? And adding
the
proper software.
I would not think so. The processor is the bus controller, and you can't
have a bus with two controllers. It would be a bit like trying to connect
a pair of PCs with a PCI or PCIe jumper cable.
To make these configurations work you need a device in between that
arbitrates the actions of the multiple controllers (PCI people call that a
"non-transparent bridge").
paul
20 Aug
20 Aug
7:49 a.m.
On Aug 19, 2021, at 4:39 PM, Charles Dickman via cctalk <cctalk at classiccmp.org>
wrote:
There are indications in the KDJ11-B processor spec on bitsavers that the
M8190 could be used in a multiprocessor configuration. For example, bit 10
of the Maintenance Register (17 777 750) is labeled "Multiprocessor Slave"
and indicates that the bus arbitrator is disabled. There is also section
6.6, "Cache Multi-Processor Hooks", that describes cache features that
allow multiprocessor operation.
Would it be as simple as connecting to 11/83 qbus together? And adding the
proper software.
Anybody ever heard of such a thing?
Chuck
Have you looked at the Falcon PDP-11/21 boards? Perhaps this is for them? I?ve never had
a Falcon board, so haven?t really read up on them.
Zane
1:31 p.m.
On Aug 19, 2021, at 7:39 PM, Charles Dickman via
cctalk <cctalk at classiccmp.org> wrote:
There are indications in the KDJ11-B processor spec on bitsavers that the
M8190 could be used in a multiprocessor configuration. For example, bit 10
of the Maintenance Register (17 777 750) is labeled "Multiprocessor Slave"
and indicates that the bus arbitrator is disabled. There is also section
6.6, "Cache Multi-Processor Hooks", that describes cache features that
allow multiprocessor operation.
Would it be as simple as connecting to 11/83 qbus together? And adding the
proper software.
Anybody ever heard of such a thing?
Chuck
See:
<https://www.miim.com/faq/hardware/multipro.shtml#qbus
<https://www.miim.com/faq/hardware/multipro.shtml#qbus>>
for more info on multi-processor PDP-11s including KDJ11-B?s.
John.
1:39 p.m.
On Aug 20, 2021, at 4:31 PM, John Forecast via cctalk
<cctalk at classiccmp.org> wrote:
See:
<https://www.miim.com/faq/hardware/multipro.shtml#qbus
<https://www.miim.com/faq/hardware/multipro.shtml#qbus>>
for more info on multi-processor PDP-11s including KDJ11-B?s.
John.
Nice.
Interestingly enough, I remember another machine that was also called 11/74; it existed in
the RSTS/E lab in Merrimack (NH). That one wasn't an MP machine; instead, it was an
11/70 with additional microcode to add the CIS (strings and decimal arithmetic)
instruction set. COBOL-11 could use this, and indeed CIS was a supported product in some
later machines. But the 11/74 CIS machine never saw the light of day.
I don't know why not. Perhaps it was not cost-effective given that it was a
physically large machine, no longer a state of the art architecture for the time (around
1980). One comment I heard is that it was forced to be canceled because it could run
COBOL faster than a VAX-11/780. No idea if that was true (either the speed claim or the
cancelation claim). It has a faint ring of plausibility to it; when the 780 came out, DEC
made some noises that PDP-11 would disappear within just a handful of years. It
didn't take them all that long to realize the absurdity of that notion.
paul
6:55 p.m.
On Aug 20, 2021, at 1:39 PM, Paul Koning via cctalk <cctalk at classiccmp.org>
wrote:
Interestingly enough, I remember another machine that
was also called 11/74; it existed in the RSTS/E lab in Merrimack (NH). That one
wasn't an MP machine; instead, it was an 11/70 with additional microcode to add the
CIS (strings and decimal arithmetic) instruction set. COBOL-11 could use this, and indeed
CIS was a supported product in some later machines. But the 11/74 CIS machine never saw
the light of day.
I don't know why not. Perhaps it was not cost-effective given that it was a
physically large machine, no longer a state of the art architecture for the time (around
1980). One comment I heard is that it was forced to be canceled because it could run
COBOL faster than a VAX-11/780. No idea if that was true (either the speed claim or the
cancelation claim). It has a faint ring of plausibility to it; when the 780 came out, DEC
made some noises that PDP-11 would disappear within just a handful of years. It
didn't take them all that long to realize the absurdity of that notion.
paul
Given what happened with the PDP-10, it seems very plausible that it was canceled due to
the VAX-11/780.
Zane
985
days inactive
990
days old
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