PDP-11 backplanes

Thanks everyone who contributed to the PDP-11 backplane discussion that was a side-thread on the PDP-11/70 board set discussion. I really had no idea that the backplane in a PDP-11 machine was essentially a board interconnect and not a "bus" in the typical sense. Now I understand what's geeky interesting about PDP-11s much more than I did before. Before that discussion, I was under the impression that they were all just typical shared address/data busses on those backplanes. My PDP-11/03 is Q-bus and its more like that than the PDP-11s that are not the VLSI versions. Thinking about it, it makes much more sense because the CPU is divided among a large number of boards and having them all sit on a common bus would be quite damaging to the performance of the CPU. So I'm guessing the way you figure out how these various CPUs are implemented using the boards is to look at the schematics and infer the connections on the backplane from those? -- "The Direct3D Graphics Pipeline" -- DirectX 9 draft available for download <http://www.xmission.com/~legalize/book/download/index.html> Legalize Adulthood! <http://blogs.xmission.com/legalize/>