On Dec 6, 2016, at 7:51 AM, Noel Chiappa <jnc at
mercury.lcs.mit.edu> wrote:
[data fetch] can't be off-loaded onto a separate interface unit, as it needs access
to
register contents held in the CPU.
Yeah, it?s pretty interesting! My guess would be that it was a separate register/command
oriented interface, sitting on the Unibus, and didn?t actually interface directly with the
11/20 CPU? Such an interface could limit the instructions ?fed? to the FPU to those
accessing its internal registers, etc. But who knows? :-)
I?ve gotten quite deep into the design of the FP11-B and associated KB11-A interfacing
during my debug (which is how I noticed all the 11/20 refs in the docs, circuitry, and
microcode), but I?m pretty ignorant of the 11/20 having never worked on one.
I wouldn't be surprised if there's some
microcode in the KB11 to support those memory operations.
Yes, there certainly is ? quite a bit of it actually. The are F/CLASS branches off all
three of the A, B, and C forks.
?FritzM.