Hi,
Anyone interested ? Unit is in Paris, France. Disk may have been formated.
If you need only some parts, it'll maybe be possible. Don't ask me anything
about this machine, I din't have it handy, but there are many ressources on
the web.
Salut!
St?phane
http://DECpicted.blogspot.com
Shannon Spurling writes:
> I have this old IBM system. I think I identified the CPU as an 8085.
> The motherboard/ card cage looks like the one from the Datamaster. Thing
> is, I can't find ANY info on it. It's a four piece system with a tower,
> monitor, keyboard and printer. The tower is huge, and has dual 8"
> floppies.
Do the tower and printer look anything like the stuff in the background
on
http://www-03.ibm.com/ibm/history/exhibits/pc/pc_9.html
According to the text this was a configuration where "two workstations
... permitted two people to use the system simultaneously", and maybe
the unit you have is the non-workstation component of the system (shared
printer access, maybe shared file access?)
Some of the keypunch-to-floppy units IBM sold in the 70's seemed to
me to be vaguely styled like the Datamaster. Maybe these also inspired
the Heath-Zenith 89.
Tim.
Anyone know a good place to source a DSSI Terminator (DEC part no
12-31281-01), ideally in the UK? All I can find is dealers who won't publish
a price. There are none on eBay either.
Regards
Rob
ZDNet a mainstream media company looked at VCF UK. It showed British-micro
history. Very interesting...could have had more commentary! Great pictures
though.
Murray--
Does anyone have a photo of a GEC Campus Packet Switch Exchange (aka
CPSE)? It's an X25 switch circa mid-80s, popular in UK Universities,
and we need a photo for a book. No offer refused; credit will be given!
--
Pete Peter Turnbull
Network Manager
University of York
On Sat, Jun 19, 2010 at 1:18 PM, Zane H. Healy <healyzh at aracnet.com> wrote:
> Now for an interesting bit of info. ?Apparently there are two different
> types of Firmware. ?One for the PDP-11, and one for VAXen. I'll see if I can
> get a little bit more info on that.
Given that the RFM (Resident Firmware Menu) which provides the setup,
autoconfiguration and diagnostics, runs natively on the host (via the
boot DU 253 shortcut), then the machine specific ROM needs the
compatible machine code, so did they release a version with VAX
machine code perhaps?
> Now for the important part, the whole manual.
> http://www.avanthar.com/~healyzh/RQZX1.pdf
Excellent, thank you for providing. It confirms what everyone has said
so far about the supported drive-set and dual-support (MSCP and
TMSCP).
One interesting note I found in the RSTS/E 9.7 release notes is this comment:
{AA-NB17A-TC} 4.3.3 TMSCP Tape Driver If your system contains only one
TMSCP tape drive (TU81 or TK50), you must designate it unit
0....elided...
NOTE The controller number must also match the drive number.
I wonder if this applies to MSCP side for disks too?
I have been offline with other distractions for a few weeks but I hope
to get back to exploring the problem booting soon.
I have this old IBM system. I think I identified the CPU as an 8085.
The motherboard/ card cage looks like the one from the Datamaster. Thing
is, I can't find ANY info on it. It's a four piece system with a tower,
monitor, keyboard and printer. The tower is huge, and has dual 8"
floppies. If I were to guess, I would presume it was a version of the
Datamaster, but I can't find any thing that states this thing was ever
made. The number on the tag says 5324, and it is IBM. Any one have info
or someplace to look? And, if it is possible, I would really like to get
my hands on some tech/repair info.
>>> Don't know if this has been posted here yet, but Don Maslin's widow
... And for anyone who is wondering -- Sellam was (is) already working
with one of the Maslin family's grown children about archives.
I have an old 286 computer i use for tasks that won't run on a newer maching... My old printer is dead and when trying to connect a new printer it doesn't work...? What can i do to get the newer printers like lexmark to go with the old 286 HP VECTRA???? TNX
Eric Smith <eric at brouhaha.com> wrote:
> Johnny Billquist wrote:
> > But if we call this an 11/74, what shall we call the 11/70 with CIS?
>
> I wrote:
> > Fantasy? There wasn't such a thing, since there wasn't an 11/70 with a
> > KB11-E CPU that was necessary to accomodate the KE74-A CIS.
>
> Johnny wrote:
> > Then you are saying that Don North's work on the CIS microcode
> > for the 11/74 is a figment of his imagination?
>
> Not at all. I'm saying that it wasn't an 11/70, and that no 11/70 had
> CIS. He seems to agree with me.
Excellent. :-)
So let's call that an 11/74 then, as I've been doing the whole time.
Then the question is, what do we call the 11/70 with modifications to be
able to run multiprocessor configurations?
Johnny
Hi guys,
I've got a Laserjet III laser scanner module kicking around in my
junkbox, harvested from an utterly screwed LJ3. It has a fibre-optic
light pipe on one side, which connects to a photosensor on the
motherboard. Does anyone know what the frequency or period of the
photocell signal is?
That is to say, how long does it take for the scanner to make one
complete pass from "horizontal blank" to the right margin -- in other
words, the time from the leading edge of one photocell pulse to the next?
I'm toying with the idea of repurposing the scanner module for another
project (using a BluRay laser diode to print directly onto photographic
paper then process using a 3-bath B&W process), and I'd like to figure
out (in advance!) what the requirements will be placed on the paper
drive system (among other things!)
Thanks,
--
Phil.
philpem at philpem.me.uk
http://www.philpem.me.uk/
Eric Smith <eric at brouhaha.com> wrote:
> Johnny Billquist wrote:
>> Another way to name them would perhaps be:
>>
>> KB11-B - Old 11/70 CPU with synch FPP.
>> KB11-C - New 11/70 CPU with asynch FPP.
>> KB11-CM - MP modified KB11-C
>> KB11-E(?) - The new 11/74 CPU with asynch FPP and CIS.
>>
>> I seem to remember reading somewhere that the 11/74 CPU were to be
>> called KB11-E, but I also have this nagging feeling that KB11-E might
>> have been the 11/44, or possibly the 11/60.
>
> The 11/44 CPU was a KD11-Z. The 11/60 CPU was a KD11-K.
That might be correct.
>> Now, as I myself pointed out, RSX regards the 11/70mP as an 11/74, and
>> that is also what the CPU identification code in RSX calls it.
>
> Since the 11/70mp and 11/74 were never official products, there was a
> lot of conflation of the designations. Without the optional CIS,
> software can't easily distinguish an 11/70mp from an 11/74, so it
> probably simply didn't bother to try. Thus whether software reports the
> CPU as an 11/70mp or an 11/74 doesn't really prove much of anything.
Indeed. Which I think I tried pointing out.
>> But if we call this an 11/74, what shall we call the 11/70 with CIS?
>
> Fantasy? There wasn't such a thing, since there wasn't an 11/70 with a
> KB11-E CPU that was necessary to accomodate the KE74-A CIS.
Then you are saying that Don North's work on the CIS microcode for the
11/74 is a figment of his imagination? And the results they got back
>from running performance tests on this hardware?
I think it's just easier, for this discussion, to call that the 11/74,
and call the multiprocessor PDP-11s that went out to field test, and
which also were kept running inside DEC until not long ago, 11/70mP.
Mind you - just for this discussion.
Otherwise I'm just happy to keep calling CASTOR:: an 11/74, just as my
emulated 11/74 (MIM::), which also don't have CIS...
Johnny
> At 8:49 PM -0400 7/1/10, Bryan Pope wrote:
>> Another great item for sale from my collection:
>>
>> http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=190412195573
I know it says different ROM version in your auction description, but
how exactly does this model differ from the Educator 64 (one of which
is also up on ebay at the moment?)
--
jht
allison <ajp166 at verizon.net> wrote:
> On 06/30/2010 11:27 AM, Johnny Billquist wrote:
>> > I'll reply to this one last time, and then I'll give up.
(I can't seem to keep out, can I? :-) )
> I can't add too much to this regarding what parts and what DEC
> designators applied
> but here are memories of the time frame.
>
> The first multiprocessor 11/70 was built with existing hardware and a few
> wire wrap and jumper mods. Memory said there were 4 total, three inside DEC
> and one at CMU that they hacked together possibly with DEC help.
CMU did multiprocessor PDP-11s before DEC did, I think. However, they
went about it differently than the 11/74 (or whatever you want to call
it). Search for C.MMP and similar stuff on the net for more information
about CMUs multiprocessor PDP-11 projects.
The 11/74 systems were designed and built inhouse, although they might
have talked with CMU to get help, experience and whatnot. Reportedly
more than three systems were built. Rumors have it that they even had
some systems out to external customers for test, but all systems were
returned at the end of the tests (even though there is a persistent
rumor about Ontario Hydro keeping their).
I think I know of/heard of three systems that were in use inside DEC
long after the system was officially cancelled. We had, of course,
CASTOR:: which was the RSX engineering system, and which was up and
running as late as 2002 (2005?) or so. This was a 4-CPU system.
Then we had POLLUX::, which I think was a 2-CPU system. Not sure, but I
think it might have been DECnet engineering who had it. The third I've
heard about is PHEANX:: which might have been POLLUX:: after a move to
field service, and possibly also using bits and pieces from other
places inside DEC.
As far as I know, all of these systems, as well as the ones gone out on
field test, were KB11-CM cpus. So, no CIS option ever made it out of
prototypes, nor any KB11-E.
The boards from the 11/74 systems that were returned were allegedly used
in plain 11/70 machines inside DEC afterwards. They were, after all,
plug compatible with the normal 11/70 systems. The KB11-E boards would
not have been that, though.
> It
> would evolve
> to a design project to make that buildable as marketing felt they could
> sell it.
> However at the same time VAX/11/780 was real and also the various product
> groups were feeling the effects of FCCs new class A and B limits for
> RFI/EMI.
> That and the high end market had been moving to more addressable memory
> for bigger datasets and computationally wider data words as the tasks were
> getting bigger. At that time the big calculations that were important were
> atomic physics and weather models and both were associated with massive
> [by that eras measure] datasets. In many respects the same pressures
> repeated
> themselves in the 32bit to 64bit evolution [Alpha].
Indeed. But looking at the papers on the 11/74, their aim was more
towards high availability. Thus the total redundancy in the system, as
well as the ability to bring CPUs and memory on- and offline while the
system is running, and even run diagnostics on one CPU while the others
were serving. Even going as far as being able to physically remove
hardware from a running system.
So, high performance and large memory applications were not the target
of the 11/74. In fact, a 4 CPU 11/74 had about three times the
performance of an 11/70, but that was only aggregated performance. A
single task ran no faster on an 11/74 than on an 11/70. Possibly slower.
The question I think DEC asked itself wether there would be more point
in just selling four 11/70 machines to the customer, or one 11/74. And
four 11/70 won.
I know that RFI/EMI became a problem around this time. I think that
originally DEC planned to stop the 11/70 because of this, but since it
was such a popular machine, and no real replacement existed for quite a
while (the VAX was not a good enough replacement for an 11/70 in some
applications, mostly realtime), they were eventually forced to redesign
the 11/70, and that is where the DEC Datasystem 570 came from.
So the 11/70 in the corporate cabinet was ok with regards to RFI/EMI
radiation, while the older style full height (H960?) cabinets are not.
Or at least that is my understanding.
> It was my understanding that the 11/70 continued as a grandfathered
> EMI and the new multiple cpu died due to EMI issues (plethora of cables
> and multiple racks) and it was a faster number cruncher than VAX-11/780.
> The VAX had higher potential as the new reigning super minicomputer. It
> wasn't long after that I'd seen a VAX-11/782, 785 and VAXclusters.
The long cables from multiple CPUs to the memory boxes might have been
an problem with RFI/EMI in an 11/74, I don't know. But the 11/74
machines I have seen in pictures have been in the newer corporate
cabinets, which would imply that they were designed to pass the RFI/EMI
requirements.
> There were several of the PDP11 flavors that would die or morph as a
> result of manufacturing and serviceability issues.
I bet. :-)
Johnny
Don't know if this has been posted here yet, but Don Maslin's widow,
Winnie, died on 12/15/09. Here is the obit:
"Bristol Maslin "Winnie" (1928-2009)
Bristol "Winnie" Maslin died peacefully at her home in La Jolla on
Christmas night, Dec. 25, 2009. Winnie was a long time resident of San
Diego and La Jolla. She was an active member of The La Jolla Villagers
and the Social Service League of La Jolla, Darlington House.
Winnie was born on April 7, 1928, to Mary and Bristol Moore in
Bardwell, Kentucky. Her family moved to Toledo, Ohio, where she grew
up. She graduated from Scott High School in Toledo. Winnie came to San
Diego as a young woman where she had a long career at Fireman's Fund
Insurance as an Underwriter. She is preceded in death by her husband
of 45 years, Donald Maslin, the love of her life. Her life with Don
was full and exciting as they traveled the world and enjoyed many
wonderful experiences together. They had many close friends as well,
with whom they shared their life. With no children of their own, they
were especially close to her sister's family in San Diego.
Winnie is survived by her sister and brother-in-law, Ann and Hal Heist
of San Diego; nieces, Deborah Sharpe and Dawn Thompson of San Diego;
nephew, David Heist of Livermore, Ca.; and many grandnieces and
nephews. She had an especially close friendship with her only sibling,
Ann. The family will greatly miss our sweet aunt who enjoyed life,
parties, laughter, family and friends.
Winnie's ashes will be scattered at sea where her husband Don's were
scattered five years ago. They are together again. A celebration of
Winnie's life will be held on Sunday, Jan. 10, at her beloved home in
La Jolla, overlooking the beauty of the La Jolla Shores."
Here is the link:
http://www.legacy.com/obituaries/signonsandiego/obituary.aspx?n=bristo
l-maslin-winnie&pid=138344556
Checked the real property database for San Diego county and it doesn't
appear that the house has sold yet.
I can share addresses and some phone numbers of the family offline if
anyone wants to try and initiate contact. Best bet might be nephew
David Heist of Livermore, CA, former owner of Hoptown Brewery. Who
lives in Livermor - Sellam?
-W
Forwarded from the rescue list...these are a favorite of mine but
unfortunately I am unable to retrieve them. Hope someone does!
---------- Forwarded message ----------
From: Bill Green <bill at supposedly.org>
Date: Thu, Jul 1, 2010 at 4:06 PM
Subject: [rescue] Fwd: Sun3 machines in Scranton PA
To: rescue at sunhelp.org
Hello,
I just saw the below on comp.sys.sun.hardware. It doesn't look like
it's been posted here.
----------------------
From: billg999 at cs.uofs.edu (Bill Gunshannon)
Newsgroups: comp.sys.sun.hardware
Subject: Sun 3's for rescue
Date: 22 Jun 2010 19:08:40 GMT
Anybody here close enough to travel to Scranton, PA interested in saving
a couple of Sun3 Ddeskside pedestels from the landfill?
Might have some stuff shortly and trying to line up a way to keep them
alive for at least a little while longer.
bill
--
Bill Gunshannon ? ? ? ? ?| ?de-moc-ra-cy (di mok' ra see) n. ?Three wolves
billg999 at cs.scranton.edu | ?and a sheep voting on what's for dinner.
University of Scranton ? |
Scranton, Pennsylvania ? | ? ? ? ? #include <std.disclaimer.h>
_______________________________________________
rescue list - http://www.sunhelp.org/mailman/listinfo/rescue
> The same with MO drives probably holds. I may still have a Pinnacle
> Apex 4.3GB drive here somewhere. In addition to being somewhat
> delicate, it was very expensive when compared to a standard IDE
> drive.
> I don't consider the later cheap removable-media drives like Zip,
> Jaz, Sparq... to be in the same reliability category as the
> Bernoullis. It's a shame that the technology was abandoned.
MO drives still have a few holdouts, in the worlds radiology and graphic arts. But CD-R and DVD-R have come to dominate even in those holdout areas.
In the radiology world variants on the RT-11 filesystem are still found today on MO drives, although the data hasn't passed through a real PDP-11 in decades.
Tim.
Jules,
A while ago you posted that you had the manual and discs for a Compaq
SLT/286. Do you by chance still have them? If so does it include the
Supplemental Programs disc?
Thanks
James
"Shoppa, Tim" <tshoppa at wmata.com> wrote:
> "Walter F.J. Mueller" <w.f.j.mueller at gsi.de> wrote:
>>> Johnny Billquist <bqt at softjar.se> wrote:
>>> > I wasn't aware that any prototypes ever were produced and came as
>>> > far as being functional. I thought it was just paper work that
>>> > had bee done.
>>>
>>> The 11/74 wasn't marketed, as pointed out in this thread, but a
>>> few systems were build by DEC. A picture of such 11/74 system
>>> was made available by Tim Shoppa, see
>>>
>>> http://www.trailing-edge.com/~shoppa/1174Xopen.jpg
>>>
>>> You'll nicely see the four CPUs.
>
>> Yes, I know of these systems. However, that is not an 11/74 on that
>> picture, but an 11/70mP. There is a difference...
>> As pointed out, the 11/70mP was marketed as an 11/74, but it's a
>> different CPU.
>
>> The easiest way to see that this is a picture of an 11/70mP is by
>> looking at the lower rotary switch, which only have four positions, and
>> not eight (which the 11/74 have). So no CIS on this machine.
>
>> The only 11/74 picture I've seen so far is the silk screen panel picture
>> posted a few days ago. Unfortunately I've already forgotten the name
>> (I'm lousy with names, sorry) of the person who posted it, and who also
>> worked on the 11/74 CIS microcode.
>
>> The machine on that picture is probably CASTOR:: by the way.
>
> The people who work with/maintain CASTOR:: call it a 11/74, FWIW.
Yes, I know.
I'll reply to this one last time, and then I'll give up.
Don North reported that he had been a part of the team that had written
the CIS microcode for the 11/74 CPU.
I commented that I thought the 11/74 CPU had only been a paper product.
Don North also pointed out that marketing "stole" the 11/74 moniker for
the 11/70mP system.
Now, throughout this discussion, we need some way of separating what we
are talking about. DEC internal project papers seems like a good start.
There we have the 11/70mP, which is a modified 11/70 with just the
addition of the ASRB cache bypass and memory interlock, as well as the
cache bypass bit in the PDR, and a cache bypass bit and flush control in
the cache control CSR.
The 11/74 is a total redesign of the 11/70 CPU, with the same
modifications as the 11/70mP, but also the addition of the CIS, removal
of one Massbus, and redesign of a whole bunch of CPU boards, including
removing one clock signal not used, and the addition of new clock
signals and control signals required by the CIS.
I'm only talking CPUs here, not systems.
Another way to name them would perhaps be:
KB11-B - Old 11/70 CPU with synch FPP.
KB11-C - New 11/70 CPU with asynch FPP.
KB11-CM - MP modified KB11-C
KB11-E(?) - The new 11/74 CPU with asynch FPP and CIS.
I seem to remember reading somewhere that the 11/74 CPU were to be
called KB11-E, but I also have this nagging feeling that KB11-E might
have been the 11/44, or possibly the 11/60.
Now, as I myself pointed out, RSX regards the 11/70mP as an 11/74, and
that is also what the CPU identification code in RSX calls it.
But if we call this an 11/74, what shall we call the 11/70 with CIS?
So, for the purpose of this thread, I decided to go with Don Norths
naming, and call the 11/70 modified for multiprocessor operations the
11/70mP. If you look at the picture on your site, Tim, you'll also
notice that the text on the front panel actually says something like
"PDP-11/74 MP". (Not sure about the /74, but you definitely see the "MP"
part. (http://www.trailing-edge.com/~shoppa/1174Xopen.jpg)
Now, compare that to Don Norths picture of the 11/74 front panel:
http://www.ak6dn.com/stuff/1174.jpg.
> They never used the term "11/70mP" in front of me for sure. I would occasionally elicit comments about multiprocessing on 73's or 93's but it always came back to "our 11/74 does it THIS WAY" because that was the working example.
I'm not disagreeing with you, Tim. I'm just trying to point out that we
have two different CPUs here, one of which I thought was never made, but
Don actually claims that it did exist, even if just as one prototype.
The system was called an 11/74 everywhere, but for the purpose of this
discussion, we need to make a distinction between the CPUs.
> I'm not saying that "11/70mP" is wrong, indeed it's used in some of the drawings and memos to describe what was commonly called the 11/74.
Yes.
> CIS was real important to some DECcies circa late 70's for some Cobol requirement but coming from the real-time side none of us ever cared. We'd just run across machines that had this unneeded option.
Indeed. And the 11/70 don't have it, nor does the 11/74 systems that
ever were used.
CASTOR:: was 4 CPUs, by the way, while PHEANX:: was only 2, if I
remember right.
Johnny
Hello all,
This is just a short email to let the West Australian members know that
the Artifactory, Perth's very own Hackerspace (in the correct sense of
the word), has started hosting a regular, fortnightly event called
'Classic Computing Appreciation Night'. Several of our current members
have at least a passing interest in collecting, restoring and setting up
classic computers; as this event is being run in conjunction with our
'Circuit Hacking Mondays', there should also be at least one or two
people around to help with the troubleshooting and repair of your
favourite micro- or mini-computer.
The space's electronics facilities include several soldering stations
and CROs, PAL/SECAM/NTSC and analogue RGB monitors, a logic analyser and
an (E)EPROM programmer. Depending on the demand, there may also be a PC
capable of reading from, and writing to, most common 3.5" and 5.25"
floppy disk and tape formats; we also have a fairly respectable
collection of OS installation kits for many DEC, SUN, HP, SGI, IBM
RS/6000, Apple, Commodore and Amiga systems. And for the particularly
adventurous, the space also has a home-designed and built CNC milling
machine and a RepRap 3D printer that could be used to machine or
(literally) print replacement parts and panels.
The space is located in Mount Lawley, and all are welcome. Advice and
ideas are free; workshop use is free for members of the hackerspace, or
$10 waged/$5 unwaged. See
http://wiki.artifactory.org.au/doku.php?id=projects:classiccmp for more
details of the event, and http://hackerspaces.org and
http://en.wikipedia.org/wiki/Hackerspace for information about the
hackerspace movement in general.
Hope to see some of you there,
Peter
On JMon, 28 Jun 2010 22:15:57 +0100, Philip Pemberton <classiccmp at philpem.me.uk> wrote:
Having played with a the Canon II printer series scanners (the guts of both the Laserjet II and Apple Laserwriter II), some comments:
> Well, working backwards from DPI and print speed gives about 3MHz dot clock:
>
> 300DPI * 11 inches (paper height) * 3ppm = 9900 lines per minute
> (thus, the line rate is 9900Hz, or 9.9kHz)
> 9900lpm * 300 dots per line = 2.97e6
> (thus, the pixel rate is 2.97MHz)
Unless you are using the control board, the above calculation is moot: the scanner is a DC brushless motor - the speed is controlled by the input voltage. The control board closes a motor loop based on the feedback optical pulse and synchroniz(s)es the speed with the shift register clock. You can chose a clock rate to suit your system, build the motor control loop with a D/A, and set up logic to fire off at the right time based on the feedback optical pulse. If you are using the control board, all you have to do is feed the data in and the board will take care of the bit clocking. If you are generating the bit clock, you can determine your DPI. The II series uses a 6-sided mirror.
> Replacing the laser assembly might be "interesting", as will realigning
> the optics. My back-of-an-envelope calculations suggest I need a 0.085mm
> spot size to get to 300DPI:
>
> 300dpi = 300 dots per inch, or 1/300in per pixel
> 1/300 * 25.4mm/in = 0.0846667
>
> Focusing that will be.... "fun", especially with a 20mW blue diode
> laser... and I need to find a beam sensor that's sensitive to blue light.
The sensor on the board should work if you remove the red filter/attenuator on the input to the fibre optic cable. You might have to either increase the gain of the amp at the detector or place an attenuator in the optical chain. In any case, you should replace the red filter with a suitable pass filter to match your laser.
IIRC the laser is collimated to the desired spot size, i.e. the beam is parallel through the optical path - no focusing per se. However, going from red to blue will change the deflection characteristics of the optical path. You will probably see a narrower page at the same distance from the folding mirror and possibly some non-linearities. By changing the distance from the final mirror you should be able to control the page width. Non-linearities are a different matter.
>
> Seems like it should work... though designing a suitable
> constant-current controller with ~3MHz analog current modulation will be
> interesting. PWM would require ~768MHz modulation, so analog is the
> "easy way out", and beam power is roughly linear from the lasing
> threshold (30mA) up to 10mW (~40mA). Hmmm.
As mentioned above, you will have to control the motor voltage to sync with the bit oscillator to achieve the DPI. Also note that most laser diodes have a photodiode as part of the assembly and power is also in a control loop.
[...]
> So am I right in thinking it has some form of PLL to generate the pixel
> clock from the beam-detect (or motor tacho?) pulses?
Actually, you probably want to fix the bit rate (crystal oscillator) and control the motor speed so that you get n bit counts between laser pulses. It should be fairly easy to control to +/- 1 bit. Note that the number of bits will be greater than the dots you wish to generate in order to take care of margins.
>
> That's along the lines of what I was going to do... lock a fairly
> slow-loop PLL off the either the beam detect or the tacho (haven't
> decided which), then use the pulses from that to drive the clock input
> for the data shifter.
>
> It's like the CX-VDO all over again.... :)
Different problem...
>
> --
> Phil.
> classiccmp at philpem.me.uk
> http://www.philpem.me.uk/
I used two scanners a few year ago to make a far IR scanner. The first was a modified mirror wheel which slow scanned the vertical and the second was the horizontal scan. The optical output was fed to pyroelectric detector found in a motion detector with modified electronics. Fun toys.
CRC
> From: "Chuck Guzis" <cclist at sydex.com>
> Not all Northstar diskettes are HS. One of the models (Advantage?)
> isn't--and it's that format that the Microsolutions MatchPoint will
> read, not the others. It's been too long since I've seen the darned
> things...
I think the machine you are thinking of might be the N* Dimension. The Advantage
still uses 10-sector floppies.
I've never seen the Dimension but vintagemicros on Ebay was selling one a while
back and had a picture of it. Apparently it was MS-DOS compatible.
RodSmallwood" <rodsmallwood at btconnect.com> wrote:
> How difficult would it be to extend one of these FGPA PDP-11's to be put
> on a quad DEC board and be a plug in replacement for say an 11/93 or
> 11/94 CPU. (M8981-AA OR 11/91-BA)?
>
> Rod
Hi Rod,
possible and feasible, but requires three tasks to be addressed:
1. an adapter board is needed to connect the FPGA development
boards (holding the FPGA and memory) to the UNIBUS or QBUS.
Main active part of this adapter board are the bus transceiver
for UNIBUS or QBUS.
2. The UNIBUS or QBUS bus interface logic can be added to the
FPGA. Given that the system clock period is small compared
to typical times of these buses it is quite simple and
straight forward to implement such a bus interface.
3. the current w11a implementation doesn't support bus masters
on the I/O bus. DMA transfers from disk/tape devices are
currently emulated. Next versions of the FPGA implementation
however will add this functionality.
But keep in mind: the current FPGA implementation isn't tremendously
faster than a J11.
Walter
everyone gather round. No hard woods, only wiffle ball bats :)
anyone own/used to own 1? In the rare event someone has one or more toasted units, and willing to part with them, I'm interested. There's more then one way to skin a cat (PERISH THE THOUGHT!).
I'm off topic but I know there are a lot of laser printer enthusiests
here and hopefully someone that has been digilent about the firmware
for this printer... not to mention people who like fixing things.
Has anyone possibly kept older firmware versions for this printer around?
I have a Magicolor 2550 that I have been running for several years.
It always had a problem where it would fall off my network and I would
have to power cycle it to recover. Didn't matter if DHCP or static IP
was used... the ethernet would just go dead.
A few months ago, I decided to "fix" this and went looking for a
firmware upgrade. My firmware was orginal and there was a newer one,
many revisions advanced. So, I reflashed the printer. This fixed the
network problem however in trade, I got two new worse problems. Now,
the image on the paper is slightly rotated... about 5 degrees so that it
is no longer square to the paper. Additionally, the front panel keypad no
longer functions and if you press any key, the printer enters into a loop,
printing a menu page and you have to power cycle it to recover. Nice.
I absolutely put in the correct firmware for this printer model so Konica
apparently has some issues.
I've gotten no response from Konica support and so I am looking for someone
who may have archived older versions of firmware so that I can revert the
thing to something less hostile.
It was otherwise a really nice color laser printer and I _should_ have just
lived with the network problem.
Again, it's a Magicolor 2550EN. Not the "DN" model which does use a different
firmware image.
Thanks and I appreciate off-topic bandwidth.
Chris
--
Chris Elmquist
"Walter F.J. Mueller" <w.f.j.mueller at gsi.de> wrote:
>> Johnny Billquist <bqt at softjar.se> wrote:
>> > I wasn't aware that any prototypes ever were produced and came as
>> > far as being functional. I thought it was just paper work that
>> > had bee done.
>>
>> The 11/74 wasn't marketed, as pointed out in this thread, but a
>> few systems were build by DEC. A picture of such 11/74 system
>> was made available by Tim Shoppa, see
>>
>> http://www.trailing-edge.com/~shoppa/1174Xopen.jpg
>>
>> You'll nicely see the four CPUs.
> Yes, I know of these systems. However, that is not an 11/74 on that
> picture, but an 11/70mP. There is a difference...
> As pointed out, the 11/70mP was marketed as an 11/74, but it's a
> different CPU.
> The easiest way to see that this is a picture of an 11/70mP is by
> looking at the lower rotary switch, which only have four positions, and
> not eight (which the 11/74 have). So no CIS on this machine.
> The only 11/74 picture I've seen so far is the silk screen panel picture
> posted a few days ago. Unfortunately I've already forgotten the name
> (I'm lousy with names, sorry) of the person who posted it, and who also
> worked on the 11/74 CIS microcode.
> The machine on that picture is probably CASTOR:: by the way.
The people who work with/maintain CASTOR:: call it a 11/74, FWIW.
They never used the term "11/70mP" in front of me for sure. I would occasionally elicit comments about multiprocessing on 73's or 93's but it always came back to "our 11/74 does it THIS WAY" because that was the working example.
I'm not saying that "11/70mP" is wrong, indeed it's used in some of the drawings and memos to describe what was commonly called the 11/74.
CIS was real important to some DECcies circa late 70's for some Cobol requirement but coming from the real-time side none of us ever cared. We'd just run across machines that had this unneeded option.
Tim.
Item number:300434169483 (9 boards @ USD10 + postage each)
AT-GPIB/TNT+. IEEE 488.2 (ISA)
Single-Board GPIB Interface and Analyzer
I think the analyzer software that runs on Windows 95/98 and ME is
bundled with the 1.70 version driver that may be available by request
(from the 2nd URL)
http://joule.ni.com/nidu/cds/view/p/id/532/lang/enhttp://www.ni.com/support/gpib/drivers/
I have run a similar card in a Compaq DeskPro 6500? P3 PCI machine with
a legacy ISA slot (captured an HP150 boot sequence).
As I read it the HPDrive software will run on Window 95/98, ME with this
board. See the HPDrive site.
http://www.hp9845.net/9845/projects/hpdrive/
(... sending this from the correct FROM address would help...)
Hi guys,
I've got a Laserjet III laser scanner module kicking around in my
junkbox, harvested from an utterly screwed LJ3. It has a fibre-optic
light pipe on one side, which connects to a photosensor on the
motherboard. Does anyone know what the frequency or period of the
photocell signal is?
That is to say, how long does it take for the scanner to make one
complete pass from "horizontal blank" to the right margin -- in other
words, the time from the leading edge of one photocell pulse to the next?
I'm toying with the idea of repurposing the scanner module for another
project (using a BluRay laser diode to print directly onto photographic
paper then process using a 3-bath B&W process), and I'd like to figure
out (in advance!) what the requirements will be placed on the paper
drive system (among other things!)
Thanks,
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
"Walter F.J. Mueller" <w.f.j.mueller at gsi.de> wrote:
> Johnny Billquist <bqt at softjar.se> wrote:
> > I wasn't aware that any prototypes ever were produced and came as
> > far as being functional. I thought it was just paper work that
> > had bee done.
>
> The 11/74 wasn't marketed, as pointed out in this thread, but a
> few systems were build by DEC. A picture of such 11/74 system
> was made available by Tim Shoppa, see
>
> http://www.trailing-edge.com/~shoppa/1174Xopen.jpg
>
> You'll nicely see the four CPUs.
Yes, I know of these systems. However, that is not an 11/74 on that
picture, but an 11/70mP. There is a difference...
As pointed out, the 11/70mP was marketed as an 11/74, but it's a
different CPU.
The easiest way to see that this is a picture of an 11/70mP is by
looking at the lower rotary switch, which only have four positions, and
not eight (which the 11/74 have). So no CIS on this machine.
The only 11/74 picture I've seen so far is the silk screen panel picture
posted a few days ago. Unfortunately I've already forgotten the name
(I'm lousy with names, sorry) of the person who posted it, and who also
worked on the 11/74 CIS microcode.
The machine on that picture is probably CASTOR:: by the way.
> arcarlini at iee.org wrote:
> > I've read somewhere that it [PDP-11/74] was full of flat ribbon
> > cables and would have been a beast to maintain.
>
> Well, you see on the picture that there was quite a bit of
> flat ribbon cables :).
Yes, when you run multiple CPU configurations, you do get many flat cables.
However, if you were to run the 11/74 in a single CPU configuration, it
would not have had more flat cables than an 11/70. So it seems strange
if that would have been the reason for cancelling it.
On the other hand, I think that CIS never was popular, or in any demand,
for the PDP-11, so if that (and multiprocess capability) was the only
things the 11/74 brought to the table to differ it from tne 11/70, then
I can understand why they would cancel it if they had problems with the
multiprocessor part.
> The 'PDP 11/70 Multiprocessor Technical Manual (Preliminary Version)'
> is on bitsavers, see
>
> http://www.bitsavers.org/pdf/dec/pdp11/1174/EK-70MP-TM_PRE_1170mp_Prelim_Te…
>
> and gives you a feeling of the modules and interconnects.
Yes. And all evidence I ever see is that the only systems DEC actually
did get working was the 11/70mP. That they actually got the 11/74 (CPU)
beyond paperwork was what was news to me.
> Johnny Billquist <bqt at softjar.se> wrote
> > You do know that the J11 is already designed for mP usage, except that
> > DECs testing of that was even more secret than the 11/74?
>
> Sure, the mP instructions WRTLCK and the TSTSET of the J11 are
> documented, and allow cleaner way to implement spin locks than
> the 'asrb hack' of the 11/74. In a future version of the w11a I'll
> probably also implement the instructions supported by 11/34 and
> J11 and make the 'processor profile' selectable at start time, much
> like in the simh simulator.
That would be nice. While RSX don't use it, you could use it for Unix,
or other systems.
The J11 also have the cache bypass bit in the PDR, btw.
What instructions are you thinking about when you say 11/34 btw?
> > But FPP is among the most important things in there as well, I'd say.
> > Lots of software who won't be happy without it.
>
> That's true from a performance point of view. However
> - you can run RSX and Fortran without FPP (did this 30 years ago
> when the FPP broke on the 11/45 I was working with...).
True. But you cannot run almost anything else. I don't think I've seen
any other language that do not require the FPP.
> - you can run 2.11BSD without FPP (I'm doing that each time I
> boot 2.11BSD).
Yes, that was fixed recently, right?
> So a FPP is very good to have, but not my highest priority. Also,
> it's quite a project to design, implement and verify it, with the
> verification, as usual, being the most time consuming part.
True.
> > By the way. You don't have to worry about cache coherency. The
> > PDP-11/74 do not do that. Cache coherency is managed by software
> > on the PDP-11 (well, in RSX, since that's the only system that
> > supports the hardware). In short, the real hardware do not implement
> > any sort of cache coherency in hardware.
>
> I know, but I'll go for a cache with full cache coherency. That will
> make it a lot easier to try a MP hack for 2.11BSD. And RSX, if I ever
> get to it, will not mind.
True. Definitely will not break anything. But it will make your life
more complicated. :-)
> Johnny Billquist <bqt at softjar.se> wrote:
> > Good thinking.
> > But I'm surprised by some numbers here. The J11 at 20 MHz is
> > only slightly faster than an 11/70. In fact, if you can throw
> > the 11/70 into running all from cache, it might even be slightly
> > faster than an 11/9x.
> > Or so I seem to remember from looking at the numbers back when
> > I last was digging into this.
> >
> > Maybe I'm mixing some numbers up here... What I do remember for
> > sure is that the 11/9x machines run at 20 MHz, and that they are
> > not more than maybe 1.2 times the speed of an 11/70 in general.
>
> oops, you are right, I was mixing numbers here and forgot about
> a factor of four. Here the revised arguments:
>
> See http://www.village.org/pdp11/faq.pages/prfmnc.html , there
> is a table comparing 11/70 with various J11 systems:
>
> 11/23 11/53 11/73 11/83 11/93
> ----- ----- ----- ----- -----
> CPU F-11 J-11 J-11 J-11 J-11
> Microcycle(ns) 300 267 267 222 222
> Clock (MHz) ? 15 15 18 18
> Performance 0.2 0.5 0.7 1.2 1.4
> (11/70 = 1)
> Cache no no yes yes no
> Floating-Pt opt no no yes yes
> Coprocessor
>
> My mistake was to forget that the J11 needs 4 clock cycles per
> microcycle (MC), that's why 18 MHz clock leads to 222 ns MC period.
>
> In the end the J11 (222ns MC) is faster than the 11/70 (150 ns MC)
> because it has a better micro architecture (three stage pipeline
> vs. instruction prefetch only). The J11 is roughly a factor two
> better compared to 11/70 in terms of MC efficiency.
Hmm, I seem to remember checking numbers a while ago and came to the
conclusion that if the 11/70 would have all memory as cache, it would
outperform the J11. Atleast at 18MHz, maybe also 20MHz.
(Btw, that table is slightly wrong, as the 11/9x eventually made it to
20MHz).
I have a processor handbook which gives instruction speeds of 11/70
instructions with cache hits and without, which tells you how fast the
machine would be if you were all cache. The 11/70 suffers because memory
is so slow.
Johnny
Johnny Billquist <bqt at softjar.se> wrote:
>>..
>> "Walter F.J. Mueller" <w.f.j.mueller at gsi.de> wrote:
>> At some later time maybe I'll try a really fast design, with separate
>> instruction and data caches and significantly more parallelism than
>> the J11 had.
> Hmm. I wonder if that might cause headaches? There might be code out
> there that require your i-cache and d-cache to be consistent with each
> other.
sure, there is self modifying code. The maindec zkdjb2 for example has
a sequence like
mov #000240,(pc)
jmp (r1)
and tests that the 'nop' was executed and not the 'jmp'. However, the
cache, even separate i-d, is only one aspect, main point is to get
all the different 'write-after-read' hazards in the pipeline under
control. That's why I stayed with a simple 'prefetch-only' 11/70-like
implementation in the first round. Even in that case one has to be
careful and suppress for example the prefetch when the destination is
pc. Otherwise a 'clr pc',often found at the end of primary bootstraps,
will not do a 'jmp @#000000' but execute the opcode after the 'clr pc'.
Walter
Hello,
Since I need to make some more space here, the following systems are
for sale. Location is The Netherlands, I can ship internationally
(probably expensive), delivery in the southern part of the UK in early
August might also be possble.
HP9000/300 double-height enclosure (IIRC this was a 317, I'll have to
check).
HP-HIl audio extension 46081A
HP-HIL Mouse + keyboard
HP 7958 hpib disk
IEM HP-IB mass storage unit with 2 3.5" floppy drives
HP-IB cables + documentation
HP9000/310 with keyboard and mouse
and also some other stuff for sale:
Philips PC200 (rebadged grid XT laptop), power supply is broken but it
will also work on DC
IBM 43p/140: 332MHz processor, 256MB ram and 9GB disk
with regards,
Michiel
Johnny Billquist <bqt at softjar.se> wrote:
> Good thinking.
> But I'm surprised by some numbers here. The J11 at 20 MHz is
> only slightly faster than an 11/70. In fact, if you can throw
> the 11/70 into running all from cache, it might even be slightly
> faster than an 11/9x.
> Or so I seem to remember from looking at the numbers back when
> I last was digging into this.
>
> Maybe I'm mixing some numbers up here... What I do remember for
> sure is that the 11/9x machines run at 20 MHz, and that they are
> not more than maybe 1.2 times the speed of an 11/70 in general.
oops, you are right, I was mixing numbers here and forgot about
a factor of four. Here the revised arguments:
See http://www.village.org/pdp11/faq.pages/prfmnc.html , there
is a table comparing 11/70 with various J11 systems:
11/23 11/53 11/73 11/83 11/93
----- ----- ----- ----- -----
CPU F-11 J-11 J-11 J-11 J-11
Microcycle(ns) 300 267 267 222 222
Clock (MHz) ? 15 15 18 18
Performance 0.2 0.5 0.7 1.2 1.4
(11/70 = 1)
Cache no no yes yes no
Floating-Pt opt no no yes yes
Coprocessor
My mistake was to forget that the J11 needs 4 clock cycles per
microcycle (MC), that's why 18 MHz clock leads to 222 ns MC period.
In the end the J11 (222ns MC) is faster than the 11/70 (150 ns MC)
because it has a better micro architecture (three stage pipeline
vs. instruction prefetch only). The J11 is roughly a factor two
better compared to 11/70 in terms of MC efficiency.
The w11a on the other side does one microcycle per clock cycle. So
one can expect that is roughly a factor 5.5 faster than a 18 MHz J11
(MC rate is 11 times higher (50/4.5), but J11 has a factor two better
MC efficiency).
Let's look at the Dhrystone benchmarks again:
w11a 11500 lps
11/53 830 lps
So the w11a is measured to be ~14 faster than a 11/53. The 11/53
has half the performance of a 11/70, so one expects that the w11a
is about a factor 7 faster than a 11/70. Because w11a and 11/70
have a similar micro architecture that should match the MC rate,
and indeed it does (50/6.7). So the numbers are consistent, finally.
Thanks for pointing that out.
Walter
Johnny Billquist <bqt at softjar.se> wrote
> You do know that the J11 is already designed for mP usage, except that
> DECs testing of that was even more secret than the 11/74?
Sure, the mP instructions WRTLCK and the TSTSET of the J11 are
documented, and allow cleaner way to implement spin locks than
the 'asrb hack' of the 11/74. In a future version of the w11a I'll
probably also implement the instructions supported by 11/34 and
J11 and make the 'processor profile' selectable at start time, much
like in the simh simulator.
> But FPP is among the most important things in there as well, I'd say.
> Lots of software who won't be happy without it.
That's true from a performance point of view. However
- you can run RSX and Fortran without FPP (did this 30 years ago
when the FPP broke on the 11/45 I was working with...).
- you can run 2.11BSD without FPP (I'm doing that each time I
boot 2.11BSD).
So a FPP is very good to have, but not my highest priority. Also,
it's quite a project to design, implement and verify it, with the
verification, as usual, being the most time consuming part.
> By the way. You don't have to worry about cache coherency. The
> PDP-11/74 do not do that. Cache coherency is managed by software
> on the PDP-11 (well, in RSX, since that's the only system that
> supports the hardware). In short, the real hardware do not implement
> any sort of cache coherency in hardware.
I know, but I'll go for a cache with full cache coherency. That will
make it a lot easier to try a MP hack for 2.11BSD. And RSX, if I ever
get to it, will not mind.
Walter
Johnny Billquist <bqt at softjar.se> wrote:
> I wasn't aware that any prototypes ever were produced and came as
> far as being functional. I thought it was just paper work that
> had bee done.
The 11/74 wasn't marketed, as pointed out in this thread, but a
few systems were build by DEC. A picture of such 11/74 system
was made available by Tim Shoppa, see
http://www.trailing-edge.com/~shoppa/1174Xopen.jpg
You'll nicely see the four CPUs.
arcarlini at iee.org wrote:
> I've read somewhere that it [PDP-11/74] was full of flat ribbon
> cables and would have been a beast to maintain.
Well, you see on the picture that there was quite a bit of
flat ribbon cables :).
The 'PDP 11/70 Multiprocessor Technical Manual (Preliminary Version)'
is on bitsavers, see
http://www.bitsavers.org/pdf/dec/pdp11/1174/EK-70MP-TM_PRE_1170mp_Prelim_Te…
and gives you a feeling of the modules and interconnects.
Walter
Hi, Walter.
"Walter F.J. Mueller" <w.f.j.mueller at gsi.de> wrote:
> Johnny Billquist <bqt at softjar.se> wrote:
> > > "Walter F.J. Mueller" <W.F.J.Mueller at gsi.de> wrote:
> > > I've also implemented a PDP-11 on an FPGA. It is a full 11/70 with
> > > split I&D, MMU and cache. No FPP so far. Available peripherals are so
> > > far DL11, LP11, KW11L, PC11, and RK11. All I/O is channeled over via
> > > 'remote-register-interface' onto a single bi-directional byte stream
> > > interface, so the FPGA board needs a backend PC with a server program
> > > to handle the I/O requests.
>
> > Any plans on the FPP? It would be really nice and useful to have.
>
> Hi Johnny,
>
> sure, an FPP is on the 'todo-list', but it doesn't have the highest
> priority. After having put the first version on OpenCores I'd like to
> add a trace/debug unit (allowing hardware breakpoints ect), and add
> a few more peripherals, especially larger disks. Currently I have
> only an RK11 controller, good enough for proof-of-principle, but
> not enough for real usage.
Disks are definitely a good thing. And as usual, I'll advocate MSCP.
Even though it's not the simplest, it's simply just the best. :-)
But FPP is among the most important things in there as well, I'd say.
Lots of software who won't be happy without it.
> > As for traps and double errors, feel free to ask. I don't know if I have
> > all the answers, but I might be able to figure them out. Besides, I also
> > have access to one (or three) functional 11/70 machines.
>
> I've tested much of the implementation against simh and xxdp's, but there
> are still a few loose ends regarding corner cases. It be great to run a
> few test programs on simh, a real 11/70, and my fpga implementation,
> called now w11a.
Feel free to talk with me more offlist, and we can see when we can
schedule some testing on real hardware.
> > The 11/53 is a really slow machine. Not that helpful to compare with. But you
> > seem to push a nice number anyway. But 50MHz... The J11 in an 11/9x machine
> > runs at 20 MHz, which would suggest that you should only be able to push about
> > 2.5 times the performance, unless you do some more clever tricks.
> > (The 11/9x machine runs all memory as cache.)
>
> I know, but the 11/53 is the only pdp-11 where I know the Unix Benchmark
> and thus the Dhrystone results, so it became the reference.
>
> Even though my implementation is quite different from the organization of
> the original 11/70, it has essentially the same instruction timing as a
> 11/45 or 11/70 when expressed in clock cycles. The 11/45 or 11/70 CPU's
> ran with a 150 ns clock period (ignoring clock stretching here), thus a
> 6.7 MHz clock. A register-register operation takes 2 cycles, a
> "mov r0,(r1)+" for example 5 cycles.
>
> Because the cpi (cycles-per-instruction) for 11/70 and the w11a is very
> similar and both have a good cache the w11a should simply be 50/6.7 or a
> factor 7.5 faster than a 11/70.
>
> The 11/70 and the w11a have some pipelining, instruction fetch and
> decode/operate can overlap for register destination instructions. The
> J11 is more pipelined, here fetch, decode, and operate stage can overlap.
> Therefore register-register instructions take 1 cycle in the best case,
> a "mov r0,(r1)+" for example 3 cycles.
>
> Therefore a 50 MHz w11a will not be 2.5 times faster than a 20 MHz J11,
> maybe just 1.5 times faster. The w11a is intentionally implemented in a
> quite simple and conservative way, prime goal was to get it right and
> working, and not to get it fast.
Good thinking.
But I'm surprised by some numbers here.
The J11 at 20 MHz is only slightly faster than an 11/70. In fact, if you
can throw the 11/70 into running all from cache, it might even be
slightly faster than an 11/9x.
Or so I seem to remember from looking at the numbers back when I last
was digging into this.
Maybe I'm mixing some numbers up here... What I do remember for sure is
that the 11/9x machines run at 20 MHz, and that they are not more than
maybe 1.2 times the speed of an 11/70 in general.
> At some later time maybe I'll try a really fast design, with separate
> instruction and data caches and significantly more parallelism than
> the J11 had.
Hmm. I wonder if that might cause headaches? There might be code out
there that require your i-cache and d-cache to be consistent with each
other.
> > IIST is needed for RSX to be happy (the only OS that supports the 11/74),
> > and you also need to implement parts of the memory bus behaviour with
> > interlocking. You can ignore the MK11 box CSRs, even though it will look
> > a little funny, but you do need separate DL11s for each CPU core, along with
> > the rest of the I/O bus, or else things will probably not work. The 11/74
> > is a shared memory machine, but not shared I/O bus.
>
> I'm fully aware of this, the MP version will have one I/O bus per CPU and
> a shared memory and asrb interlock, and caches with proper cache coherency.
Yes. But what I was thinking of was the fact that at a level below this,
you have the CPU that be issuing read-modify-write cycles to memory, and
those needs to be interlocked to memory.
At a higher level, the 11/70 was modified for asrb to always bypass
cache, and then you had two other ways to bypass cache as well. But
bypassing cache is only half the problem, as you also need to make sure
some memory operations are atomic, as seen from other cpus.
But if you know a thing or two about cpu and memory design (which it
would appear you do), then you probably understand the problem already.
By the way. You don't have to worry about cache coherency. The PDP-11/74
do not do that. Cache coherency is managed by software on the PDP-11
(well, in RSX, since that's the only system that supports the hardware).
In short, the real hardware do not implement any sort of cache coherency
in hardware.
> It's true that RSX is the only OS that supports an 11/74. Unfortunately I
> don't have an RSX11-M plus license. So the plan is to patch 2.11BSD to support
> an MP system. Sounds like a long shot, but looking into the kernel sources
> I concluded that a funneling or 'big kernel lock' type MP support seems to
> be quite feasible. Will not scale well, but for a 'dual-core' this is likely
> good enough.
It's definitely doable. However, it is not that simple.
The reason why DEC choose RSX as the OS for implementing multi-processor
support is that it does not, in general, use interrupt priority levels
to serialize access to data, protect sections of code, or implement locks.
Unix do. So, in short, everywhere where the interrupt priority is
changed, you potentially need to change the code, since another
processor might still get interrupts at that level, and do things you
thought you had locked out.
But I see your problem. It would be great if we could solve the
situation with RSX at some point...
Johnny
>> 140420130808
> Looks like a 5ESS ate it, from the other material for sale in this lot.
They all seem to have Dilog CU160's. What was the CU160? Disk, communications?
My bet is the seller was once one of the Boston-area DEC used equipment dealer of the 70's/80's, who is now into Telecom instead.
Let's see, in the late 80's: American Used Computer was already pass? (wasn't he in Boston?). ELI was big. Who else was there? I used to know all the names by heart. There were several who weren't as big as ELI but still worthwhile.
Tim.
Item number:140420111955
If someone in Europe would be interested I should like to arrange it to get
one. Of course the price is high but It allows to make an offer.
Sergio
2010/6/15 Jim Stephens <jws at jwsss.com>
> Does anyone have some Prodos and or other software for one of these? My
> supply is locked up, and I don't know if I ever had Prodos.
>
> The system I'm getting had its prodos floppy stepped on by a misque long
> ago, and it was overwritten, so at a minimum I would appreciate that.
>
> I could send the damaged disk and let you overwrite at my expense as an
> alternative if media is a problem, or I can dig for some blanks in my pile.
>
> thanks
> Jim
>
I've got a Xytronic 137ESD
(http://www.howardelectronics.com/xytronic/137ESD.html).
Which of these tips, keeping in mind I have the 137ESD, would be
appropriate for surface mount work?
http://www.howardelectronics.com/xytronic/tips.html
What temperature should I be set at for soldering? The number 630F
comes to mind, but I'm not sure.
What type of solder? I think I'm using 63/37, I think .015 OD.
Should I use flux? In what form? A pen? A syringe? A brush?
Any other standard accessories that might help?
Thanks
Keith
Does anyone have some Prodos and or other software for one of these? My
supply is locked up, and I don't know if I ever had Prodos.
The system I'm getting had its prodos floppy stepped on by a misque long
ago, and it was overwritten, so at a minimum I would appreciate that.
I could send the damaged disk and let you overwrite at my expense as an
alternative if media is a problem, or I can dig for some blanks in my pile.
thanks
Jim
Johnny Billquist <bqt at softjar.se> wrote:
> > "Walter F.J. Mueller" <W.F.J.Mueller at gsi.de> wrote:
> > I've also implemented a PDP-11 on an FPGA. It is a full 11/70 with
> > split I&D, MMU and cache. No FPP so far. Available peripherals are so
> > far DL11, LP11, KW11L, PC11, and RK11. All I/O is channeled over via
> > 'remote-register-interface' onto a single bi-directional byte stream
> > interface, so the FPGA board needs a backend PC with a server program
> > to handle the I/O requests.
> Any plans on the FPP? It would be really nice and useful to have.
Hi Johnny,
sure, an FPP is on the 'todo-list', but it doesn't have the highest
priority. After having put the first version on OpenCores I'd like to
add a trace/debug unit (allowing hardware breakpoints ect), and add
a few more peripherals, especially larger disks. Currently I have
only an RK11 controller, good enough for proof-of-principle, but
not enough for real usage.
> As for traps and double errors, feel free to ask. I don't know if I have
> all the answers, but I might be able to figure them out. Besides, I also
> have access to one (or three) functional 11/70 machines.
I've tested much of the implementation against simh and xxdp's, but there
are still a few loose ends regarding corner cases. It be great to run a
few test programs on simh, a real 11/70, and my fpga implementation,
called now w11a.
> The 11/53 is a really slow machine. Not that helpful to compare with. But you
> seem to push a nice number anyway. But 50MHz... The J11 in an 11/9x machine
> runs at 20 MHz, which would suggest that you should only be able to push about
> 2.5 times the performance, unless you do some more clever tricks.
> (The 11/9x machine runs all memory as cache.)
I know, but the 11/53 is the only pdp-11 where I know the Unix Benchmark
and thus the Dhrystone results, so it became the reference.
Even though my implementation is quite different from the organization of
the original 11/70, it has essentially the same instruction timing as a
11/45 or 11/70 when expressed in clock cycles. The 11/45 or 11/70 CPU's
ran with a 150 ns clock period (ignoring clock stretching here), thus a
6.7 MHz clock. A register-register operation takes 2 cycles, a
"mov r0,(r1)+" for example 5 cycles.
Because the cpi (cycles-per-instruction) for 11/70 and the w11a is very
similar and both have a good cache the w11a should simply be 50/6.7 or a
factor 7.5 faster than a 11/70.
The 11/70 and the w11a have some pipelining, instruction fetch and
decode/operate can overlap for register destination instructions. The
J11 is more pipelined, here fetch, decode, and operate stage can overlap.
Therefore register-register instructions take 1 cycle in the best case,
a "mov r0,(r1)+" for example 3 cycles.
Therefore a 50 MHz w11a will not be 2.5 times faster than a 20 MHz J11,
maybe just 1.5 times faster. The w11a is intentionally implemented in a
quite simple and conservative way, prime goal was to get it right and
working, and not to get it fast.
At some later time maybe I'll try a really fast design, with separate
instruction and data caches and significantly more parallelism than
the J11 had.
> IIST is needed for RSX to be happy (the only OS that supports the 11/74),
> and you also need to implement parts of the memory bus behaviour with
> interlocking. You can ignore the MK11 box CSRs, even though it will look
> a little funny, but you do need separate DL11s for each CPU core, along with
> the rest of the I/O bus, or else things will probably not work. The 11/74
> is a shared memory machine, but not shared I/O bus.
I'm fully aware of this, the MP version will have one I/O bus per CPU and
a shared memory and asrb interlock, and caches with proper cache coherency.
It's true that RSX is the only OS that supports an 11/74. Unfortunately I
don't have an RSX11-M plus license. So the plan is to patch 2.11BSD to support
an MP system. Sounds like a long shot, but looking into the kernel sources
I concluded that a funneling or 'big kernel lock' type MP support seems to
be quite feasible. Will not scale well, but for a 'dual-core' this is likely
good enough.
Walter
Hello Everybody,
Does anybody happen to have the contents of the PDP-11 boot/diagnostics
proms 23-248F1 & 23-616F1 available in SIMH loader format?
These are the proms on the M9312 boot/termination card.
Thanks,
Ed
--
Dit is een HTML vrije email / This is an HTML free email.
<arcarlini at iee.org> wrote:
> Johnny Billquist [bqt at softjar.se] wrote:
>> > I wasn't aware that any prototypes ever were produced and
>> > came as far as
>> > being functional. I thought it was just paper work that had bee done.
>
> iirc CASTOR and POLLUX were PDP-11/74s that were actually used by one of
> the
> DEC PDP-11 software groups for a while. (Or maybe the PDP-11/74 was used
> for
> a while and then broken up to form CASTOR and POLLUX ... )
No, both CASTOR and POLLUX was running at the same time for a while.
CASTOR was used by the RSX development group while POLLUX was either
DECnet or field service. I can't remember which.
But I'm fairly sure that CASTOR and POLLUX were just 11/70mP systems.
>> > Nice to hear. Too bad the machine never got to production. It
>> > would have
>> > been a nice system...
>
> I've read somewhere that it was full of flat ribbon cables and would
> have been a beast to maintain.
Yes, that is one of the stories I've heard too. But that was related to
the mP systems. The 11/74 CPU as such could (I assume) be run in a
single processor configuration as well, just like the 11/70. In which
case, you'd just have an upgraded 11/70, which would have been nice.
Johnny
On 06/23/2010 22:14, Rob Jarratt wrote:
> Are you in the UK? I seem to need a mini-DIN connector which looks like it
> has 8 pins. I also believe the mouse connects to the keyboard, I am not sure
> if it has to be a special mouse or not, but if you have a mouse to go with
> the keyboard that would be even better.
>
> Thanks
I only have one mouse but 4 keyboards.. I can send you a keyboard but
not the mouse if you like.
I'm in West Sussex, contact me off list i guess
Roger
On 6/23/10 5:14 PM, Rob Jarratt wrote:
> Are you in the UK? I seem to need a mini-DIN connector which looks like it
> has 8 pins. I also believe the mouse connects to the keyboard, I am not sure
> if it has to be a special mouse or not, but if you have a mouse to go with
> the keyboard that would be even better.
It does not need to be a "special" mouse, but it DOES need to be a Sun
mouse. I say that because they're far more common in my world than
those other weird mice that PCs use. ;)
But yes, the mouse connects to the keyboard, and you will need one if
you intend to run the machine as a graphical workstation.
-Dave
--
Dave McGuire
Port Charlotte, FL
On 06/22/2010 23:16, Rob Jarratt wrote:
> I believe I may need a type-5 or type-6 keyboard with a
> mini-DIN connector. I can't find much on eBay. Can anyone tell me where to
> find such a keyboard? I don't want to spend a lot because Sun is not my
> thing really, but it would be nice to get it working.
>
> Thanks
>
> Rob
>
I have a bunch of these from a job lot i bought if you want one and dont
mind scraping some grime off them!
I think i have a 5c and a 6 keyboard
does that sound the correct sort?
Roger
Don North <ak6dn at mindspring.com> wrote:
> Johnny Billquist wrote:
>> > "Walter F.J. Mueller" <W.F.J.Mueller at gsi.de> wrote:
>> >
>>> >> The reason why I picked a 11/70 and not a J11 as target is because my
>>> >> goal is a 11/74. I've implemented the IIST already and tested against
>>> >> the IIST Diagnostic I could find in XXDP (riiab0). A dual core will
>>> >> fit into a single xc3s1200e of the NEXYS2 board. The work needed is
>>> >> quite clear and doable (changes on cache, mmu, and cpu core for asrb).
>>> >> However, I've no plans to implement the CIS, so it will always be a
>>> >> subset of a 11/74. But for sure fun to do and run.
>> >
>> > You do know that the J11 is already designed for mP usage, except that
>> > DECs testing of that was even more secret than the 11/74?
>> >
>> > The 11/74 definitely don't need CIS though. I don't think any
>> > prototype 11/74 even had it. It was planned for the next generation of
>> > the machine, that never got built. Anyway, it was to be an option for
>> > the CPU as far as I know. Just as FPP.
>
> Here's a front panel from a 'real 11/74', the uniprocessor one with
> CIS: http://www.ak6dn.com/stuff/1174.jpg
Thanks for sharing that, Don. Now that I see it, I realize that I have
seen it before.
> Note the CIS uADDRS and other CIS status lights selectable on the rotary
> switch on the right.
>
> The marketing dinks appropriated the 11/74 moniker for the wanna-be
> 11/70mp program because '11/74' sounded better for a 4 way MP system.
Yeah, as usual, name confusion is fun. Interestingly enough, RSX
identifies the 11/70mp as an 11/74.
> After the 11/74 CIS COBOL benchmarks came in, the native PDP-11 CIS
> implementation on the 11/74 blew the 11/780 benchmarks away. DEC
> marketing did not like this; it made selling business customers the just
> released 11/780 more difficult. The decision was made to kill the 11/74
> CIS option the day we released it to manufacturing in favor of the new
> VAX system.
I wasn't aware that any prototypes ever were produced and came as far as
being functional. I thought it was just paper work that had bee done.
> Johnny is right, the 11/74 option was a multiboard set (just like the
> FPP option) that could be plugged into the new 11/74 backplane (which
> was an 11/70 backplane with all the CPU and FPP slots pushed down by
> four to make room for the CIS option in the first slots).
>
> I wish I had saved more documentation (print sets, microcode listings,
> etc) but to my knowledge none of this survives for the 11/74 CIS. Only
> my front plex panel which I took as a souvenir.
>
> I was one of the three engineers who wrote the microcode for the CIS
> option subsystem (total of 4K words of 96bit wide horizontal microcode).
Nice to hear. Too bad the machine never got to production. It would have
been a nice system...
Johnny
"RodSmallwood" <rodsmallwood at btconnect.com> wrote:
> How difficult would it be to extend one of these FGPA PDP-11's to be put on
> a quad DEC board and be a plug in replacement for say an 11/93 or 11/94 CPU.
> (M8981-AA OR 11/91-BA)?
You would need to implement the whole bus arbitration and protocol
logic. And hook that up to the cpu. But that should be it.
Not sure how difficult it would be. DEC had a pretty big chip that did
all of that from the J11.
Johnny
I have a "moving box" filled with Multiflow documentation at
my workplace.
According to wikipedia, they only sold 125? systems.
Intermediate Language Document Version 4.3
-- unbound, stamped Company Confidential all over
The UNIX Operation System Programmer's Reference Manual, Section 1
-- in Multiflow 3 ring binder
The UNIX Operation System Multiflow System Administrator's Guide,
Reference Manual, and Supplement
-- in Multiflow 3 ring binder
The UNIX Operating System Programmer's Supplement, Parts I and II
-- in Multiflow 3 ring binder
Multiflow Forgran User's Guide and Reference Manual
-- in Multiflow 3 ring binder
Multiflow Computer Miscellaneous Documents
-- in Multiflow 3 ring binder
TRACE/UNIX Programmer's Reference Manual Sections 2-7
-- in Multiflow 3 ring binder
Multiflow TRACE Assembler and Operation Set Refrence Manual
& Data Transfer Guide
& C Language Notes
-- in Multiflow 3 ring binder
The UNIX Operating System Multiflow System Administrator's Guide
Reference Manual, and Supplement
-- in Multiflow 3 ring binder
I really can't accept the task of preserving them myself. I've had
these at work (and I believe I posted them once before (if not on this
list, then on another)).
I don't know if any Multiflow Systems survive today, but it would be
a shame to see these recycled.
They are located in Cambridge MA near the Alewife redline T station stop.
If you have the means to pick these up, are are willing to pay to have
these shipped... please give these a home.... it would be great to see
these preserved on a site like bitsavers rather than lost for all time.
-- Curt
> From: "A. Christoff Baumann"
>
> If you figure out a solution, there's an entire hobby (amateur radio)
> that is dying that would love to hear your solutions.
The solution is oriented towards hands on training, doing, and actual
elmering (mentoring) as opposed to just telling someone how to do
something, i.e. get involved with helping/teaching instead of just telling!
I am constantly amazed that for the most part, the only people buying
the older Heathkit/Eico/etc. electronics are "old" people who are buying
more for nostagia as opposed to learning.
And this also applies to classic computers. At the last swapmeet, I had
an HP85A for sale with not one person showing any interest.
Most of us here have a lot on our plates, and that makes it easy to
rationalize we don't have time. BS. We find time to do what we want.
A bigger problem IMNSHO is not having any idea of where this training we
could offer leads. I'm not sure any of us are into wasting time per se.
And doing something without a clue where it will lead (especially with a
full plate of stuff to do) makes it easy to not spend the effort to
teach or get involved with others.
BTW, someone told me that Heathkit has started selling kits again; has
anyone heard this?
Marvin
David Gesswein <djg at pdp8online.com> wrote:
>> > I'm very much interested in both of those. Can I talk you into making
>> >them available?
>> >
> I have a copy of vista here
>
> http://www.pdp8online.com/pdp8cgi/os8_html?act=dir;fn=images/os8/dewar-edit…
>
> In a search I found this
> http://vandermark.ch/pdp8/local/Sources/read_dir.php?f=Other/new-22-vista-2…
>
> It appears to be the vista editor source. The actual vista source seems to
> be in the empty at the end if its complete. I haven't tried to build it. Has
> modules for a couple different terminals.
I have the sources for VISTA as well. However, it is written in PAGE8,
which is another assembler for the PDP-8. I also happen to have PAGE8,
so I should make all of that available, when I have time and access to
my PDP8 systems.
I also have the VISTA manual, but I think I might only have it in paper
form, so I guess I should try and scan that at some point as well...
And yes, I'll try to upload my EMACS-clone as well. Just give me time... :-)
Johnny
I have one of these that I would like to get going or at least
see how far i can get.
I don't see much out there except Al's site. Witch has limited info.
Does anyone know of? hardware and trouble shooting? manuals and
what type of? terminal interface they used.? I found this is a Horse
arena upside down.
Jerry
I have a bunch (about 13 pounds) of catalogs and datasheets for VME
products from various manufacturers, plus a directory or two. Any
interest in the pile for $5 plus shipping (media rate - cheap)?
Contact me off list.
--
Will
Don North <ak6dn at mindspring.com> wrote:
> On 6/22/2010 12:34 AM, E. Groenenberg wrote:
>>> >>
>>> >> Johnny is right, the 11/74 option was a multiboard set (just like the
>>> >> FPP option) that could be plugged into the new 11/74 backplane (which
>>> >> was an 11/70 backplane with all the CPU and FPP slots pushed down by
>>> >> four to make room for the CIS option in the first slots).
>>> >>
>> > How was this achived? By reducing the Massbus card space by 4 boards
>> > so 3 interface sections were available? Or by redesigning the processor
>> > in such a way that there were less boards needed?
>> >
>> > Ed
>> >
>> >
>
> Removed one of the MASSBUS controllers.
That makes sense. MASSBUS was on the decline anyway. And if you were
going with mP systems, you could hook up massbuses to several CPUs,
meaning you'd get a lot of them in the end anyway.
Or actually, this was probably when MASSBUS was still very much hip.
Well, mP still meant you could get lots of massbuses on the system, and
RSX-11M+ supported mixed massbus configurations anyway, so you could get
away with fewer massbuses.
The other option would have been to remove the 4 slot Unibus at the back
of the CPU, and just have the single SPC slot, and the out.
> The CPU board set was essentially the same, slot for slot. There were
> several boards that needed rev/ECO to provide hooks for the CIS option,
> but all in all these were minor updates and were backward compatible.
As far as I can tell, it's both changes for CIS, and also changes for mP
capabilities.
> IIRC the main change was to add additional microcode to the base 11/70
> microengine (from 256 to 512 words) by doubling the PROM bit density.
> This code did all the base instruction dispatch and operand fetch for
> the CIS unit.
Looked through the document you provided in another post. Interesting
stuff...
Johnny
I can send you one for the cost of shipping, contact me off-list.
-Dave
--
Dave McGuire
Port Charlotte, FL
On Jun 22, 2010, at 6:16 PM, "Rob Jarratt"
<robert.jarratt at ntlworld.com> wrote:
> I was given a Sun Ultra 5 the other day, not really a vintage
> machine, at
> least not yet, hence "slightly OT". I don't know anything about these
> machines but I expect there will be people on this list who do. The
> machine
> came without a keyboard or mouse and I think I need at least a
> keyboard to
> get it to boot. I believe I may need a type-5 or type-6 keyboard
> with a
> mini-DIN connector. I can't find much on eBay. Can anyone tell me
> where to
> find such a keyboard? I don't want to spend a lot because Sun is not
> my
> thing really, but it would be nice to get it working.
>
> Thanks
>
> Rob
On 6/22/10, Philip Pemberton <classiccmp at philpem.me.uk> wrote:
> Reverse engineering is a great way to spend a day! :)
Many of my nicer ones have been spent thusly.
> I've got a Planar EL panel on my desk, "liberated" from a supply of Sun
> spares (apparently it's meant for a StorEdge A5000 series box). 160x80
> pixels, and a 6x3 touchscreen. Very cool looking
Sounds really cool.
> Anyway, I think I spent about three days probing and tweaking it. It's a
> standard controller (Epson SED1335) but the touch screen controller is
> an ASIC. Turns out it's nice and simple though... Full details (pinouts
> and code) on my website if anyone's interested.
I'll have to check it out - I've been hacking HD44780 and T6963 and
SED<mumble> displays for years for LCDproc. It's especially fun to
pull on from some dead bit of technical kit and put the LCD back in
service. I've done that with a $8 front panel from a satellite TV
converter box (LEDs, buttons and 2x40 HD44780 LCD) among others.
-ethan
I was given a Sun Ultra 5 the other day, not really a vintage machine, at
least not yet, hence "slightly OT". I don't know anything about these
machines but I expect there will be people on this list who do. The machine
came without a keyboard or mouse and I think I need at least a keyboard to
get it to boot. I believe I may need a type-5 or type-6 keyboard with a
mini-DIN connector. I can't find much on eBay. Can anyone tell me where to
find such a keyboard? I don't want to spend a lot because Sun is not my
thing really, but it would be nice to get it working.
Thanks
Rob
Rob Jarratt wrote:
> I have a MicroVAX 3400. It uses quite a lot of power compared to my other
> MicroVAXen (about 180-200W). It has an M9060 Load Module installed and I
> understand that this is needed to give the power supplies enough load to
> work correctly. However, if I have enough stuff already in the machine then
> it would seem that this module is just sucking up power needlessly. How much
> stuff do you need in the machine to make the M9060 redundant? At the moment
> I have a KA640 CPU and a KA655 CPU, two 16MB memory boards a DESQA and the
> TK70 controller. I do not yet have any DSSI disks for it, nor do I have a
> KFQSA, but the KA640 has DSSI built in.
Just remove it and see if the machine stays powered up.
Peace... Sridhar
Rob Jarratt [robert.jarratt at ntlworld.com] wrote:
> I have a MicroVAX 3400. It uses quite a lot of power compared
> to my other MicroVAXen (about 180-200W). It has an M9060 Load
> Module installed and I understand that this is needed to give
> the power supplies enough load to work correctly. However, if
> I have enough stuff already in the machine then it would seem
> that this module is just sucking up power needlessly. How
> much stuff do you need in the machine to make the M9060
> redundant? At the moment I have a KA640 CPU and a KA655 CPU,
> two 16MB memory boards a DESQA and the TK70 controller. I do
> not yet have any DSSI disks for it, nor do I have a KFQSA,
> but the KA640 has DSSI built in.
Each of the two PSUs needs to be sufficiently loaded to work and if
either is not happy the system shuts down. So if you arrange to have
enough load in slots 7-12 you can put the load board to one
side for now.
However, the CPU and memory need to be in the first few slots
(iirc) and I very much doubt that a DESQA and a TQK70 are
enough to keep a PSU happy. If you had a KDA50 in there
you'd be fine, I would guess.
> Incidentally, anyone know why this machine has two PSUs if
> they are not (as I have read somewhere) redundant?
I assume that there was not a single PSU around that could supply
all 12 slots. There are at least two BA200 series enclosures:
the 12 slot one you have and a smaller 6 slot one. I assume that
a single power brick is enough for the smaller enclosure and
that it was simpler to have two power bricks in the bigger
enclosure rather than go off and design a more powerful brick.
Remember that when these things were new 180W was chicken feed
compared to the more powerful machines of the day (like the
VAX 6000 series).
Antonio
Rob Jarratt wrote:
>>I suspect the PERQs you
>>mentioned were the ones that were in the NMoC anyway
>
> I failed to find these, and I think they also have a Cray on display, which
> I also failed to find. I should have asked someone I suppose.
The PERQs and Cray are in the "Scientific Computing" room in H Block.
There's a lot of DEC hardware in there, such as VAX, PDP and the like.
I think the TU77 tape drive that I took to BP is in that room, too.
--
John Honniball
coredump at gifford.co.uk
On Tue, Jun 22, 2010 at 1:08 PM, Rob Jarratt
<robert.jarratt at ntlworld.com> wrote:
> I have a MicroVAX 3400. It uses quite a lot of power compared to my other
> MicroVAXen (about 180-200W). It has an M9060 Load Module installed and I
> understand that this is needed to give the power supplies enough load to
> work correctly. However, if I have enough stuff already in the machine then
> it would seem that this module is just sucking up power needlessly. How much
> stuff do you need in the machine to make the M9060 redundant?
>
> Incidentally, anyone know why this machine has two PSUs if they are not (as
> I have read somewhere) redundant?
The power planes of a BA213 backplane are split into a left half
(slots 7 to 12) and a right half (slots 1 to 6). Each power suppy
only supplies its half of the backplane. If you look at the bare
backplane there are power bus bars at the top and and bottom of the
slots which are visibly split into a left half and a right half.
The BA213 Enclosure Maintenance manual (EK-189AA-MG-001) says that a
M9060 load module must be installed in one of the backplane slots 7
through 12 if the continuous minimum current drawn on the second power
supply is less than 5 amperes. If the minimum current of 5 amperes is
not reached, the power supply enters an error mode and shuts down the
system.
I have a MicroVAX 3400. It uses quite a lot of power compared to my other
MicroVAXen (about 180-200W). It has an M9060 Load Module installed and I
understand that this is needed to give the power supplies enough load to
work correctly. However, if I have enough stuff already in the machine then
it would seem that this module is just sucking up power needlessly. How much
stuff do you need in the machine to make the M9060 redundant? At the moment
I have a KA640 CPU and a KA655 CPU, two 16MB memory boards a DESQA and the
TK70 controller. I do not yet have any DSSI disks for it, nor do I have a
KFQSA, but the KA640 has DSSI built in.
Incidentally, anyone know why this machine has two PSUs if they are not (as
I have read somewhere) redundant?
Regards
Rob
"Walter F.J. Mueller" <W.F.J.Mueller at gsi.de> wrote:
> Hi there,
>
> Brad Parker just posted about his FPGA implementation of a PDP-11,
> which boots so far RT-11, RSTS V4, BSD 2.9 and Unix V6. There was a
> question how fast an FPGA solution might be compared to a PDP-11/93.
>
> I've also implemented a PDP-11 on an FPGA. It is a full 11/70 with
> split I&D, MMU and cache. No FPP so far. Available peripherals are so
> far DL11, LP11, KW11L, PC11, and RK11. All I/O is channeled over via
> 'remote-register-interface' onto a single bi-directional byte stream
> interface, so the FPGA board needs a backend PC with a server program
> to handle the I/O requests.
Cool! Nice!
> The design is FPGA proven, runs on Digilent S3 and NEXYS2 boards, the
> former with 1 MB 10 ns SRAM, the later with 16 MB 70ns PSDRAM.
>
> Resource consumption is
> S3 board xc3s1000 2471 slices or 33%
> NEXYS2 board xc3s1200e 2624 slices or 30%
>
> The implementation was verified against many XXDP maindec's. There are
> some open issues, especially some details of trap and double error
> handling aren't correct yet. In practice this is of little importance,
> the FPGA system happily boots and runs BSD 2.11, a system using 22bit
> addressing and split I&D space. {Note: you need patch 447 for 2.11BSD
> to get FPP emulation and RK support working}
Any plans on the FPP? It would be really nice and useful to have.
As for traps and double errors, feel free to ask. I don't know if I have
all the answers, but I might be able to figure them out. Besides, I also
have access to one (or three) functional 11/70 machines.
> On Performance: The design runs at 50 MHz. I've run parts of the
> Byte Unix benchmark on the FPGA systems. Given that the FPP is only
> emulated by the 2.11BSD kernel it makes only sense to look at the integer
> benchmarks. The Dhrystone benchmark 'dhry2reg' gives about '11500 lps'
> on both boards. For comparison see Michael Schneiders page
> http://www.vaxcluster.de/mambo/bench2.php?mach=pdp11 which gives about
> '830 lps' for a 11/53. There is little Dhrystone difference between
> the two boards despite the very different memory access times. The
> 8 kB cache with 32 bit cache lines really helps on the NEXYS2 board.
The 11/53 is a really slow machine. Not that helpful to compare with.
But you seem to push a nice number anyway.
But 50MHz... The J11 in an 11/9x machine runs at 20 MHz, which would
suggest that you should only be able to push about 2.5 times the
performance, unless you do some more clever tricks.
(The 11/9x machine runs all memory as cache.)
> I'm in the middle of homogenizing some internal interfaces and of some
> code cleanup, also the backend handler needs a re-write in C++ (currently
> perl). When that's done I'll make the whole package (VHDL sources, test
> benches, backend) available on 'OpenCores'.
>
> Finally a comment to Dave Mitton's remark
>> > Now what would be really cool would be to make 4 CPUs and re-create
>> > an 11/74 quad.
>> > http://www.miim.com/faq/hardware/multipro.html#castor
*Sigh* I wonder if anyone is ever going to be able to set Bruce Mitchell
right on his facts.
CASTOR didn't disappear. I talked with Dave Carroll about it not so many
years ago, and the machine was still around, altough at that time with a
hardware problem causing it to be down.
(There are plenty of other small errors on Bruce Mitchells pages as
well, but from my small dealings with him in the past, he don't seem to
be interested in listening.)
> The reason why I picked a 11/70 and not a J11 as target is because my
> goal is a 11/74. I've implemented the IIST already and tested against
> the IIST Diagnostic I could find in XXDP (riiab0). A dual core will
> fit into a single xc3s1200e of the NEXYS2 board. The work needed is
> quite clear and doable (changes on cache, mmu, and cpu core for asrb).
> However, I've no plans to implement the CIS, so it will always be a
> subset of a 11/74. But for sure fun to do and run.
You do know that the J11 is already designed for mP usage, except that
DECs testing of that was even more secret than the 11/74?
The 11/74 definitely don't need CIS though. I don't think any prototype
11/74 even had it. It was planned for the next generation of the
machine, that never got built. Anyway, it was to be an option for the
CPU as far as I know. Just as FPP.
IIST is needed for RSX to be happy (the only OS that supports the
11/74), and you also need to implement parts of the memory bus behaviour
with interlocking. You can ignore the MK11 box CSRs, even though it will
look a little funny, but you do need separate DL11s for each CPU core,
along with the rest of the I/O bus, or else things will probably not
work. The 11/74 is a shared memory machine, but not shared I/O bus.
Johnny
Vintage Computer Festival comes to Chicago!
The fifth edition of VCF Midwest will take place in Chicago (OK, Lombard is
a suburb) this fall - join us on September 18 in conjunction with ECCC as we
once again coax vintage electrons into motion.
The show will run from 8:00 AM on Saturday on into the night, coming to an
official close at 1:00 AM Sunday morning. Early setup will be available on
Friday evening from 5-6:30 PM, at which time the exhibition area will be
locked until the show opens on Saturday morning.
In addition to exhibitions of eclectic electronica, we will feature
speakers, vendors and a Vince Briel workshop (come ready to homebrew!).
Admission is FREE to all whether you come to show, look, build, talk or
sell.
Exhibitor and session info to follow shortly, but save the date NOW!
Join us!
Jack Rubin
chiclassiccomp
Rooms are available at a reduced rate at the adjoining Fairfield Inn. Ask
for "ECCC" or "vintage computer" rates.
http://marriott.com/property/propertypage/CHIFS
Our Facebook Page -
http://www.facebook.com/event.php?eid=137065072974225
**************************************************************
Please feel free to share this information with others who might be
interested. Thank you.
PDP 8/L about 2 years ago at TRW. everyone was looking at it and
marveling at how old it was, and I was counting the 12 front panel
switches, and getting out my $1.
TRW (Northrup / Grumman, LA)swap meet has a combination of computer
users (like me with more than one PC in the house, and potentially a big
pile running), HAMs with their junk (sometimes bring in old computer
stuff), people dumping tailings from local DMRO (or whatever) sales, or
just scrappers with odd bits of stuff.
The computer scrap stores around are pretty much gone now, you have to
know the scrappers and deal with them. And I"m not talking about
"recyclers" though they might yield some things.
Jim
On 6/22/2010 12:05 AM, Rob Jarratt wrote:
> Would you say that a radio rally was a potential good source for computer
> equipment for someone who is not interested in radio, or were you just
> lucky? I have had a look to see what is on in my area and there is a radio
> rally coming up near me quite soon and I am wondering if it would be worth
> going along.
>
> Regards
>
> Rob
obtained 2 rainbows last night. The only k/b we could find in the guy's basement had a CTITOAH (or whatever the hell) designation, although it looked exactly like a R* k/b. I didn't argue the point. I now have 1 k/b between 3 R*s.
Haven't cracked the veep open yet. I imagine it has a z80 or something monotonous like that. I'll screech if it has an 8088/8086, but I truly doubt it. Text is blue, strange, but was told it's a mono monitor. Need anything anyone can provide for it. Thanks.
Wrong tools is sometimes just an excuse. I routinely solder SMD chips
with .025" pin spacing with a soldering iron with about a 3/32" tip.
Granted it is not my first choice, but my other iron died, and I'll use
what I have. Since it works, I don't have a lot of incentive to buy the
proper sized tip even though it makes soldering a LOT easier.
My first choice would be a Metcal with a proper sized tip!
And if I were in better shape financially and/or project wise, I'd take
the complete P112 kit just for the fun of soldering the SMD components
in place.
Marvin
>> The P112 looks pretty interesting. I'd consider a partial kit
>> depending on the price. While I have successfully soldered one SMT
>> part (the FTDI chip on the X0xb0x board), it wasn't fun and I would
>> probably like to try to avoid having to do it again. I think I just
>> lucked out that I didn't fry the chip. I bridged a number of pins
>> and had to clean up with solder wick.
>
> Wrong tools. Betcha anything.
>
> -Dave
Hi there,
Brad Parker just posted about his FPGA implementation of a PDP-11,
which boots so far RT-11, RSTS V4, BSD 2.9 and Unix V6. There was a
question how fast an FPGA solution might be compared to a PDP-11/93.
I've also implemented a PDP-11 on an FPGA. It is a full 11/70 with
split I&D, MMU and cache. No FPP so far. Available peripherals are so
far DL11, LP11, KW11L, PC11, and RK11. All I/O is channeled over via
'remote-register-interface' onto a single bi-directional byte stream
interface, so the FPGA board needs a backend PC with a server program
to handle the I/O requests.
The design is FPGA proven, runs on Digilent S3 and NEXYS2 boards, the
former with 1 MB 10 ns SRAM, the later with 16 MB 70ns PSDRAM.
Resource consumption is
S3 board xc3s1000 2471 slices or 33%
NEXYS2 board xc3s1200e 2624 slices or 30%
The implementation was verified against many XXDP maindec's. There are
some open issues, especially some details of trap and double error
handling aren't correct yet. In practice this is of little importance,
the FPGA system happily boots and runs BSD 2.11, a system using 22bit
addressing and split I&D space. {Note: you need patch 447 for 2.11BSD
to get FPP emulation and RK support working}
On Performance: The design runs at 50 MHz. I've run parts of the
Byte Unix benchmark on the FPGA systems. Given that the FPP is only
emulated by the 2.11BSD kernel it makes only sense to look at the integer
benchmarks. The Dhrystone benchmark 'dhry2reg' gives about '11500 lps'
on both boards. For comparison see Michael Schneiders page
http://www.vaxcluster.de/mambo/bench2.php?mach=pdp11 which gives about
'830 lps' for a 11/53. There is little Dhrystone difference between
the two boards despite the very different memory access times. The
8 kB cache with 32 bit cache lines really helps on the NEXYS2 board.
I'm in the middle of homogenizing some internal interfaces and of some
code cleanup, also the backend handler needs a re-write in C++ (currently
perl). When that's done I'll make the whole package (VHDL sources, test
benches, backend) available on 'OpenCores'.
Finally a comment to Dave Mitton's remark
> Now what would be really cool would be to make 4 CPUs and re-create
> an 11/74 quad.
> http://www.miim.com/faq/hardware/multipro.html#castor
The reason why I picked a 11/70 and not a J11 as target is because my
goal is a 11/74. I've implemented the IIST already and tested against
the IIST Diagnostic I could find in XXDP (riiab0). A dual core will
fit into a single xc3s1200e of the NEXYS2 board. The work needed is
quite clear and doable (changes on cache, mmu, and cpu core for asrb).
However, I've no plans to implement the CIS, so it will always be a
subset of a 11/74. But for sure fun to do and run.
With best regards, Walter
Heya. Given the penchant of people on this list to collect all sorts of obsolete and antique tech, I figured I'd throw a query out here.
I live in an old apartment block that has a 1920's vintage Western Electric intercom system. The system is in need of some "help" (it still works, but is far from what you'd consider 'optimal'). I'm a phone guy by trade, and would love to spend some of my personal time making this system work like it did when it was installed in 1927.
If anybody out there has any knowledge of antique intercom systems like this, please E-mail me off list. I can provide more information (like pictures of the equipment and a better description). Just don't want to further dive down this rabbit hole on this list.
For that matter, if there's a discussion list relevant to antique telephone systems, referring me there would be appreciated as well.
Hi guys,
Here's something for you lot to play with. It's a software
implementation of the "Phase Jerked Loop" data separator, in C++
(although most of the logic is C), complete with notes...
This is extremely sub-optimal, but "It Works For Me"... :)
Tests against the old "Helix" decoder engine (the "smart" histogram
analyser that really is anything but) are still ongoing. As a bare
minimum, the timing figures need to be optimised -- most timesteps will
end up with no accompanying state change. If you can eliminate some of
these timesteps, you can speed up the code quite a bit. The catch is
that the timestep must be a multiple of NSECS_PER_PLLCK/2,
NSECS_PER_PLLCK and NSECS_PER_ACQ... The optimal value should be
lcm(NSECS_PER_PLLCK/2, NSECS_PER_ACQ) [lcm = lowest common multiple].
Optimising the timing factors for a given acq-clock is likely to be the
hardest part of the whole process...
I'm willing to bet it'll work with data grabbed from a Catweasel, but I
don't have any test data to play with... so that's left as an exercise
to the reader.
mfmbits is a vector<bool> which starts out empty and contains the output
MFM bits after the loop has run. A sync marker will appear in mfmbits as
0x4489.
buf is either an array or a vector containing integers of any sane size.
These represent the timing values in units of Tacq (Tacq = 1/Facq, the
frequency at which the acquisition counter is incremented). buflen is
the length of this buffer.
License is GPLv2, code is copyrighted to me. If you want to use this in
closed-source software, email me and ask for a less restrictive licence.
I'm getting pretty pissed off with people in the floppy disc
preservation/analysis field keeping their toys to themselves (*cough*
SPS), and have no intention of contributing further to such nonsense.
> /**
> * This is a software implementation of Jim Thompson's Phase-Jerked Loop
> * design, available from AnalogInnovations.com as the PDF file
> * "FloppyDataExtractor.pdf".
> *
> * This consists of:
> * A data synchroniser which forces RD_DATA to be active for 2 clock cycles.
> * A counter which increments constantly while the PLL is running, and is
> * reset to zero on an incoming data bit.
> * Whenever the counter reaches half of its maximum value, a
> * new data window is started.
> */
>
> // Nanoseconds counters. Increment once per loop or "virtual" nanosecond
> unsigned long nsecs1 = 0, nsecs2=0;
> // Number of nanoseconds per acq tick -- (1/freq)*1e9. This is valid for 40MHz.
> const unsigned long NSECS_PER_ACQ = 25;
> // Number of nanoseconds per PLLCK tick -- (1/16e6)*1e9. 16MHz.
> // This should be the reciprocal of 32 times the data rate in kbps, multiplied
> // by 1e9 to get the time in nanoseconds.
> const unsigned long NSECS_PER_PLLCK = 125/2;
> // Number of clock increments per loop (timing granularity)
> const unsigned long TIMER_INCREMENT = 1;
> // Maximum value of the PJL counter. Determines the granularity of phase changes.
> const unsigned char PJL_COUNTER_MAX = 16;
>
> // Iterator for data buffer
> size_t i = 0;
>
> // True if RD_DATA was high in this clock cycle
> bool rd_latch = false;
> // Same but only active for 2Tcy (SHAPED_DATA)
> int shaped_data = 0;
>
> // Phase Jerked Loop counter
> unsigned char pjl_shifter = 0;
>
> // data window
> unsigned char data_window = 0;
>
> #ifdef VCD
> FILE *vcd = fopen("values.vcd", "wt");
> fprintf(vcd, "$version DiscFerret Analyser D2/DPLL 0.1 $end\n"
> "$timescale 1 ns $end\n"
> "$var reg 1 * clock $end\n"
> "$var reg 1 ' pll_clock $end\n"
> "$var reg 1 ! rd_data $end\n"
> "$var reg 1 %% rd_data_latched $end\n"
> "$var reg 1 ^ shaped_data $end\n"
> "$var reg 8 & pjl_shifter $end\n"
> "$var reg 1 ( data_window $end\n"
> "$upscope $end\n"
> "$enddefinitions $end\n"
> "$dumpall\n"
> "0*\n"
> "0'\n"
> "0!\n"
> "0%%\n"
> "0^\n"
> "b00000000 &\n"
> "0(\n"
> "$end\n"
> );
> #endif
> do {
> // Increment counters
> nsecs1 += TIMER_INCREMENT;
> nsecs2 += TIMER_INCREMENT;
>
> // Loop 1 -- floppy disc read channel
> if (nsecs1 >= (buf[i] * NSECS_PER_ACQ)) {
> // Flux transition. Set the read latches.
> rd_latch = true;
> shaped_data = 2;
>
> // Update nanoseconds counter for read channel, retain error factor
> nsecs1 -= (buf[i] * NSECS_PER_ACQ);
>
> // Update buffer position
> i++;
> }
>
> // Loop 2 -- DPLL channel
> if (nsecs2 >= NSECS_PER_PLLCK) {
> // Update nanoseconds counter for PLL, retain error factor
> nsecs2 -= NSECS_PER_PLLCK;
>
> // PJL loop
> if (shaped_data > 0) {
> pjl_shifter = 0;
> } else {
> // increment shifter
> pjl_shifter = (pjl_shifter + 1) % PJL_COUNTER_MAX;
> }
>
> // DWIN detect
> if (pjl_shifter == (PJL_COUNTER_MAX / 2)) {
> // Data window toggle. Latch the current RD_LATCH blob into the output buffer.
> mfmbits.push_back(rd_latch);
> // Clear the data latch ready for the next data window.
> rd_latch = false;
> // Update DWIN
> data_window ^= 0x01;
> }
>
> // Update shaped-data time counter
> if (shaped_data > 0) shaped_data--;
> }
> } while (i < buflen);
>
> printf("mfmbits count = %lu\n", mfmbits.size());
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
The condition is unknown (other than not cracked and not rusty,) the
box looks original, the RAM slots are empty, the ROM chips are labeled
Boot 0 - Boot3, the zip code is 60074.
Anyone want it?
--
silent700.blogspot.com
Retrocomputing and collecting in the Chicago area:
http://chiclassiccomp.org
Hi Everyone,
A classic computer of the 8-bit era, the Coleco ADAM, is celebrated by
all Adamites of Canada and the U.S.A., each year is winding up in Montreal,
our 22 annual convention. The central part in my opinion is how to run an
ADAM emulator on the PC. For those who still have a working ADAM, more power
to you all.
Happy classic computing!
Murray :)
I referred someone to this mailing list, but he's unable to join. The
server says that he needs to wait to be approved, but nothing happens.
--
David Griffith
dgriffi at cs.csubak.edu
A: Because it fouls the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
I've been talking to someone who posted an amiga 1200 on craigs list.
This is in the chicago area. She has a lot of AV and test equipment
also. I have no relation to her, I'm just passing the list along
incase anyone is interested. I'm also pasting in a description of the
amiga from another thread. Contact her directly (Amy) for pics and
details: smittygal7 at hotmail.com
The seller replied with some pictures. It's a normal amiga 1200 with
a GVP (jaws) 68EC030-40 accelerator without a scsi controller.
Unknown ram. It's the model that didn't come with a hard drive,
although one has almost certainly been added. There's a vga adapter
on the back of the 1200, but it appears that it's not a flicker fixer.
They probably had it attached to a monitor that would sync low
enough. She's including a 1084s monitor with the machine. The tower
has two time base corrector boards installed in what looks like an
8086 type clone motherboard. I'm guessing this because it has the fat
5150 style keyboard connector. Chances are, this motherboard is there
only to make the power supply spin up and to provide ISA slots to
power the TBC boards. I was hoping it was some sort of expansion
chassis that could add zorro or video slots to a 1200, but no dice.
1. Datacom Technologies ET-2 V.35 Error Rate Test Set, brand new wtih
manual, case, power pack, etc...
2. Used, Black Box SAM 232-60
3. Plantronics Wilcom Model T336B Circuit Test Set
4. ADK A Joslyn Company 720- TEST Adam-720 test set
1. SHARP XG-E1200U LCD Projector BRAND NEW in BOX w/REMOTE
2. Yamaha RX 595 Natural Sound 2ch stereo Reciever
3. Astrodesign Inc. Digital Video Generator VG-814 GREAT CONDITION,
LIKE BRAND NEW
4. Plantronics Wilcom Digital Circuit Test Set M#:T336B
5. TOA-9000 Power Amp/Mixer/Matrix BRAND NEW IN BOX
6. SONY STR-GX800ES HI-FI FM/AM STEREO RECEIVER BRAND NEW
7. Pioneer VSX-3300 2-channel MONSTER Audio/video Receiver/Used in
great condition
8. Technics Stereo RS-TR232 Double Cassette GREAT USED
9. Panasonic AG-1960 Pro-line Video Cassette Recorder
10. Onkyo TA-R401 Vintage Stereo Cassette Tape Deck RI
11. Realistic STA-116 Digital Synthesized AM/FM Stereo Reciever
12. Panasonic PV-S7670 BRAND NEW IN BOX SUPER VHS-VCR
13. Panasonic Omnivision Video Cassette Recorder PV-4464 Brand new in box
14. SENCORE CR70 UNIVERSAL CRT ANALYZER AND RESTORER
15. Panasonic Professional Video Cassette Player AG-5100-P new in box
16. Denon Audio CD/Cassette Combi-deck- BRAND NEW IN BOX
17. Tenma Monitor Tester 16 Scan Formats 72-1070 brand new
18. Tenma Dummy Loader 72-4060
"Zane H. Healy" <healyzh at aracnet.com> wrote:
> Now for an interesting bit of info. Apparently there are two
> different types of Firmware. One for the PDP-11, and one for VAXen.
> I'll see if I can get a little bit more info on that.
Huh? That sounds extremely weird, and until you find very good proof of
that, I would say that it is false. In the end, it's a Qbus device, and
talks Qbus just like anything else. It's also an MSCP controller, which
means it talks MSCP, just like any other MSCP controller. And they work
the same no matter if they are controlled by a VAX CPU or a PDP-11 CPU.
> Now for the important part, the whole manual.
> http://www.avanthar.com/~healyzh/RQZX1.pdf
Excellent! Thanks for putting this up there.
> Looking through the list of supported hardware I see where this is a
> board that is of use to very few Hobbyists. It is interesting that
> the older versions of the OS's can't support it, when they support
> something like a Viking QDT just fine.
It is worth pointing out that support OS versions is just a list of the
versions that was current when the manual was written. That does not
mean that the board don't work in previous versions.
The RQZX1 is an MSCP/TMSCP controller, and thus will work with any OS
version where the MSCP/TMSCP driver exist, and work. So, it's no
different than the QDT, or any other MSCP controller.
More or less the same is also true for disk drives. Most any SCSI drive
will work fine. The same is probably also true for tape drives.
Pros with the RQZX1:
It's easy to set up. Switchpacks are easy and obvious. You can boot into
the internal diagnostics. You have the option of 2*MSCP or MSCP+TMSCP.
You have a floppy interface in there as well.
Cons with the RQZX1:
It's a quad board. No more than 4 disks on one controller. No more than
one tape on a controller (it is rather inflexible).
Still, if you have one, it's a nice board to have around.
Johnny
On Thu, Jun 17, 2010 at 9:59 AM, Zane H. Healy <healyzh at aracnet.com> wrote:
> Okay, here is what I learned. ?My comments are in parentheses.
This is great! thanks for taking the time to chase this down.
> 1. When writing an image out to the HD, you must have the exact same number
> of blocks for the image and the HD. ?(This is why I'd suggested dd'ing the
> HD to an image, using that image with SIMH to do the install, and then
> dd'ing it back.)
Ok, this is easy to test, I will report back with the results.
> 4. RSTS/E might only support up to a 2GB drive (I use a 2GB drive).
I will be using 1GB (or thereabouts) drive.
I already said I will be there. I'm going sometime tomorrow (Friday)
and I'll be there on Saturday at least. Anyone else staying in
Bletchley on Friday night or Saturday? Fancy meeting up?
--
Pete Peter Turnbull
Network Manager
University of York
ebay item #310225342321
"Miltope Corp. Vintage Flexible Disk Drive P/N 465490F, P/N
13049073, NSN: 1430-01-124-2671 NOS Condition.
Never Installed. Complete and intact. Should be completely
functional.
Used in the Western Electric Nike System. 8" Floppy Disk Drive.
Used for running simulation programs.
Smoke Free Environment. Please e-mail with any questions.
Sold as is. No Warranty. USA Address Only. LAST ONE!!!"
FYI
--
"The Direct3D Graphics Pipeline" -- DirectX 9 draft available for download
<http://legalizeadulthood.wordpress.com/the-direct3d-graphics-pipeline/>
Legalize Adulthood! <http://legalizeadulthood.wordpress.com>
Hello everybody,
Hopefully, somebody can help me out there...
Lately, I?hooked?a M2442AC (which is basically the M2442A with an extra buffer) to a QT13-type coupler in a?microVAX, in order to save some tape contents to disk and CD-ROM. Unfortunately, when?read a tape on VMS with the DIR-command,?I get the following?console-output:
%DIRECT-E-OPENIN, error opening UVAX33$MUA0:[]*.*;* as input
-RMS-E-FND, ACP file or directory lookup failed
-SYSTEM-F-TAPEPOSLOST, magnetic tape position lost
VMSMUP050.A;1
?
Although there seems to be a problem, the name of the file can be read out. Copying doesn't work, though. I get the same error.
?
Therefore, I launched the NVRAM-internal diagnostics of the Emulex-controller. The manual of the controller points out the NVRAM-settings for some types of drives, but not for drives made by Fujitsu :(
The diagnostic tests, which can be run out of the diagnostics menu, all fail (except for "BOT/rewind"- and "host memory DMA"-tests) with the same error description:
?
** ERROR ** Blank tape read
?
I can't find any furhter description to that error type. I tried to play this the NVRAM settings for the type drive and made repetitive tests, but each time, I get the same error.
Does anybody uses such a drive/controller combination and give me some help regarding the settings ?
Here are the current ones, which are stored in the QT13 for my fujitsu-drive:
?
Drive type, 0=Start-Stop, 1=Streamer (0-1,def=1 dec) :
On the fly commands (Y/N,def=Y) :
Enable data busy timeout delay? (Y/N,def=Y) :
Remote density (Y/N,def=Y) :
CDC tape drive (Y/N,def=N) :
Use IDEN line to select remote density (Y/N,def=N) :
IDEN line true selects high density (Y/N,def=N) :
Adaptive DMA (Y/N,def=Y) :
Blank Tape Timeout value, in seconds (1-60,def=5 dec) :
Max retry count for tape errors (0-10,def=3 dec) :
uSec Delay between DMA bursts (4/8,def=4) :
Adaptive DMA threshold (1-7,def=4 dec) :
Tape Drive Speed thousands of bytes/second (0-65535,def=625 dec) :
Support? 800 BPI Density (Y/N,def=N) :
Support 1600 BPI Density (Y/N,def=Y) :
Support 6250 BPI Density (Y/N,def=Y) :
?
"def=" means that this is the currently stored value.
?
Any ideas what might be the problem here?
?
Thanks alot for any hints in advance !
?
Best regards,
Pierre
?
?-------------------------------------------------------------------------------
Pierre's collection of classic computers : http://classic-computing.dyndns.org/
Hi all --
For anyone attending next month's HOPE (Hackers On Planet Earth)
conference in NYC, make sure you attend the vintage computing lecture on
Saturday (7/17) by myself and Bill Degnan. We're scheduled for noon in
the Lovelace room on the hotel's 18th floor. Topic is computer history
of the local region.
Also, if anyone is coming from way out-of-town, then ping me and we'll
arrange tours of our computer museum here on the NJ shore.
- Evan K.
Just curious, has anything been done with this?
On Sat, Mar 20, 2010 at 9:40 PM, Guy Sotomayor <ggs at shiresoft.com> wrote:
>
> On Mar 15, 2010, at 1:00 PM, Julian Wolfe wrote:
>
> > I'd really prefer RP emulation. This would allow use of older OS
> versions.
> > I'd also really prefer to see a UNIBUS version.
>
> I'm planning on doing one that'll handle all of the disk types found on
> Unibus PDP11s (ie no MSCP). The design is sketched out. It's just finding
> the time...
>
> TTFN - Guy
>
> >
> > -----Original Message-----
> > From: cctalk-bounces at classiccmp.org [mailto:
> cctalk-bounces at classiccmp.org]
> > On Behalf Of e.stiebler
> > Sent: Wednesday, March 10, 2010 6:50 PM
> > To: General Discussion: On-Topic and Off-Topic Posts
> > Subject: Re: Solid State Disk replacement for RD53, 54, RK05, RL02/02
> >
> > Rob Jarratt wrote:
> >> There was a thread recently on the comp.sys.dec newsgroup which ended up
> >> with the suggestion from David Riley that he would be prepared to build
> an
> >> FPGA-based board with a QBUS interface on one side and an SD interface
> on
> >
> > Is there really still interest in it ?
> >
> > I put my design away few years ago, as I didn't see anybody interested
> > enough to buy one.
> > There is the seasonal talk of it for sure, but ...
> >
> > OTOH, they old ones show up on ebay frequently, and they are not that
> > expensive.
> >
> > Remarks ?
> >
> > Cheers
> >
> >
>
>
Several years ago, Hans Pufal of ACONIT was one of the people working on restoring a PDP-9 to working condition. In the course of the restoration, they found many DECtapes of PDP-9 and PDP-15 software, which he put up on some personal pages on the museum's web site.
The pages are long gone, and the Internet WayBack Machine has only partial remains. In particular, the images of ADSS15 source DECtapes 2, 3, 7, 8, and 14 are missing, along with the .zip files for ADSS15 and DOS-15.
Does anyone on the list have copies of these (especially the DECtape images)?
Feel free to contact me privately if you like.
Thanks,
Rich
Rich Alderson
Vintage Computing Sr. Server Engineer
Vulcan, Inc.
505 5th Avenue S, Suite 900
Seattle, WA 98104
mailto:RichA at vulcan.com
mailto:RichA at LivingComputerMuseum.orghttp://www.PDPplanet.org/http://www.LivingComputerMuseum.org/
At 01:15 PM 6/17/2010, Rich Alderson wrote:
>South end of Arlington Heights. When I was in high school (1967-69),[1]
>there were two or three radomes at the site--which was in the middle
>of large corn (maize, for our cousins across the Atlantic) fields,
>which have been industrial parks and suburban housing since the 1970s.
Sometime cctalk-list contributor Ed Thelen maintains a site about former
Nike sites.
http://ed-thelen.org/loc-i.html#C-80
- John
Nigel Williams <nigel.d.williams at gmail.com> wrote:
> On Mon, Jun 14, 2010 at 3:22 AM, Johnny Billquist <bqt at softjar.se> wrote:
>> > All right. Time to clear up some misconceptions, I see... :-)
>
> Thank you (and Jerome/Zane) for taking the time to explain and
> educate, I hope I am learning quickly.
No problem, and the questions so far have not been simple or obvious, so
I think it's actually good questions, which also others might benifit from.
And just as you ask, you'll probably suddenly realize that you're
answering some too...
>> > Nigel Williams <nigel.d.williams at gmail.com> wrote:
>> > Ie, if the RQZX1 is putting some special information on the disk during the
>> > formatting, you cannot then take the drive to some other system and connect
>> > and use it there expecting things to not become messed up.
>
> fair point - I sort of hoped any underlying format changes would be
> invisible to UNIX's stream-of-blocks(characters) view of the world.
The basic formatting of a disk is the same for all. In fact, with SCSI,
you just send a command to the disk itself, asking it to format itself.
So there can't be any differences on that level.
If the RQZX1 is doing some tricks, it will have to be that it hides some
blocks for it's own use, and put data there that it "needs".
Those will be normal disk blocks, and another controller will see them
as just simple data blocks in that case.
However, I should stress that I do not know if the RQZX1 really does
this or not. I know that the CMD controllers do not. I've written disks
on a Unix machine, and moved them over to a PDP-11 without problems.
But I have not tried this with the RQZX1, so I don't know if anything is
different with that controller.
> I have a plan B - if I can find a way to convert the .TAP file and
> then "dd" onto a DDS tape I can try booting that by attaching a TZL09
> to the RQZX1.
Should be doable.
> On Mon, Jun 14, 2010 at 5:12 PM, Nigel Williams
> <nigel.d.williams at gmail.com> wrote:
>> > I have a plan B - if I can find a way to convert the .TAP file and
>> > then "dd" onto a DDS tape I can try booting that by attaching a TZL09
>> > to the RQZX1.
>
> Crash goes that plan...the RQZX1 does not allow mixed devices on the
> SCSI side, so no tape and disk together.
Hum? I thought it could. However, you might need to move jumpers around
to allow for that.
This also made me realize that maybe you have your controller configured
in a specific way that explains a thing or two for me.
The RQZX1 can be configured as disk-tape or disk-disk. In the disk-disk
case, one of the disks will use SCSI units 0-3, while the other will use
units 4-6. That would totally explain why your SCSI id 4 maps to MSCP
lun 0. You're on the "second" disk controller. And that also explains
why you cannot use any tapes.
As I said before, I don't have a RQZX1 manual anywhere near, so I can't
help with the configuration here, but I suspect you might want to look
more at this.
> Does anyone know what interface the RQZX1 has for tape? it looks like
> it could accept a TK70 cable.
Just SCSI as far as I know. The only other connection is for a floppy,
unless I remember wrong.
Johnny
Apologies first, but I know there are some good A/V guys here...
Please reply to me _off-list_, since this isn't ClassicCMP, and I'm
only subscribed to the daily digest.
I got my self a nice (older) RCA DVD player, model RC5220P; as seen here:
http://www.amazon.com/RCA-RC5220P-DVD-Player/dp/B00000J05A
Now, on the back, there are 2 phono jack connectors (one yellow, one
white); which are labeled RF output. The manual says you need to use an
RF adapter, part number CRF800.
Here's my question: in usual A/V tradition, a yellow phono connector is
composite video, and white (not paired with a red) would be a line level
mono audio. Is that the case here?
I ask, because I would like to use it with a VCR that only has mono
phono connectors.
And yes, searching the web was most unhelpful....
I'm tempted to just hook it up to my Sony A/V receiver, but don't want
to fry anything.....
--
--- Dave Woyciesjes
--- ICQ# 905818
--- AIM - woyciesjes
--- CompTIA A+ Certified IT Tech - http://certification.comptia.org/
--- HDI Certified Support Center Analyst - http://www.ThinkHDI.com/
Registered Linux user number 464583
"From there to here,
From here to there,
Funny things
are everywhere."
--- Dr. Seuss
--
--- Dave Woyciesjes
--- ICQ# 905818
--- AIM - woyciesjes
--- CompTIA A+ Certified IT Tech - http://certification.comptia.org/
--- HDI Certified Support Center Analyst - http://www.ThinkHDI.com/
Registered Linux user number 464583
"From there to here,
From here to there,
Funny things
are everywhere."
--- Dr. Seuss
Hi folks,
there's a DEC rack from a pdp10 computer sitting in a basement around
here (Kiel).
It's the pdp10 pendant of the common H960 rack i.e. it has the same size
but everything else is slightly different.
Comes empty and in fair condition. No faceplate. But both grey side
panels. There's one DC distribution panel at the lower left side.
If anybody is interested, please contact me! If nobody likes to pick up
the rack, it will go to scrap sometime next week.
Kind regards,
Philipp
P.S.: Sorry, I currently have no pictures.