My rt11 sends printer output to a lpt.txt. I have not done much more
regarding printing than that. I have an LA180 with serial for my actual
pdp8e.
B
Bill Degnan
twitter: billdeg
vintagecomputer.net
> From: Eugene (W2HX)
> Before deleting this, someone ... should double check to make sure I am
> right that the file is incorrect. ... But it seems to be backward to me.
Well, it is, and it isn't. The board is drawn with the 'bottom' (in DEC
nomenclature, for when the board is inserted in a backplane where the slots
run vertically) at the top of the drawing, and vice versa.
But, other than that, it appears to be correct - based on the keyed slots.
(So, the first land, at the bottom of the drawing, which is the 'top' of a
DEC board, normally, is AA. And the last - top of the drawing, 'bottom' of
the card when it's in vertical slot - is DV. Etc, etc.)
Noel
Hi friends.
I am 100% new to my pdp8e and I am troubleshooting a problem.
The problem is that whenever address bit 7 I asserted, I also see MD bit 4 asserted.
I am hoping there is a simple short somehow between these lines somewhere. I should mention that my setup has known working boards with the exception of M8310 does not work (all of my boards were tested in another machine one by one). So I am hoping the problem noted above might be occurring on the M8310 board itself.
I found a document that describes the signals on the bus located here:
http://bitsavers.informatik.uni-stuttgart.de/pdf/dec/pdp8/pdp8e/Omnibus_leg…
I noticed that B1J (MA7) is directly adjacent to B1K (MD4). Could this be related?
So I decided to pull my 8310 and check the resistance between these signals on the edge of the board. However, I cannot seem to square the signals named in the PDF and what I see on the card edge connector on the board.
I am wondering if I am not understanding the PDF correctly. I have the board sitting on my table with the components facing up and the omnibus card edge is at the bottom of the card. Going from left to right, do I have connectors ABCD or is it something else? Maybe DCBA?
Other than the reference PDF, is there another PDF that has a more detailed description of the bus and the signals?
Thanks
Eugene
Al,
I thought the problem with switching these chips was that part of the ROM code was embedded in them? I.e. it isn't just an issue of battery? Am I wrong? If I am then why not use one of the replacement chips that are available??
Thanks.
-Ali
-------- Original message --------
From: Al Kossow <aek at bitsavers.org>
Date: 1/21/17 12:12 PM (GMT-08:00)
To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
Subject: DS12887 pcb substitute with battery
someone just pointed this out on vcfed
https://oshpark.com/shared_projects/qyNfzAMf
I'm starting to pick up my KA630 emulator again. In particular, I want
to give it MSCP disk.
I have various MSCP documentation files, but they talk about MSCP
proper. None of them describe the Q-bus - nor even Unibus - port
drivers in enough detail for me to write an emulator; most of them
barely mention either Q-bus or Unibus.
I find I wrote a bunch of code, and I'm fairly sure it was based on a
doc file, but I cannot now find that doc file. And I find the code
disagrees with NetBSD's MSCP support. I tried to use the NetBSD driver
as documentation but end up with the response ring doing unexpected
things.
So, I'm looking for the Qbus port specification. One of the text files
I found on bitsavers (a DEC-internal TMSCP document) says "See
UNIBUS/QBUS Storage Systems Port Specification for additional detail".
I also found a message to a simh mailing list, quoting an RQDX3
document which, in its "Applicable Documents" list, has
o UQSSP (Unibus/Qbus Storage Systems Port Specification)
Those sound like what I want.
Anyone happen to know where I might be able to find such a thing?
/~\ The ASCII Mouse
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Not so much newsworthy, but 2 weeks ago I stumbled by accident on the
serial option for the LA180 (Decprinter I). My offer was accepted and I
got the card 2 days ago. I installed it this afternoon and after
configuring
it and checking the jumpers on the main board, it now works as a serial
printer.
Tomorrow I'm going to connect it with simh and see if printing jobs
will get processed as well.
Ed
--
Ik email, dus ik besta.
BTC : 1Lk6141nvDKPxtCa5erfFyovsoJN2LKqNJ
> From: Eugene (W2HX)
> I noticed that B1J (MA7) is directly adjacent to B1K (MD4). Could this
> be related?
"Rule #1: There are no concidences." :-)
> I have the board sitting on my table with the components facing up and
> the omnibus card edge is at the bottom of the card. Going from left to
> right, do I have connectors ABCD or is it something else? Maybe DCBA?
I don't know Omnibus, but I expect it follows the DEC connector conventions:
http://gunkies.org/wiki/DEC_card_form_factor
and in that configuration, Pfrom left to right, the groups should be D to A.
Generally one goes from right to left, so A to D in that direction; the pins
go from A to V in that direction.
Noel
Hey folks,
Helping my ex clean out her basement, she had a 1999 tray-loading "lime"
iMac G3 that she no longer wanted. The machine is complete w/ original
keyboard, mouse, and power cord. Boots and runs MacOS 9.2. CRT is
arcing occasionally (probably dust around the flyback?)
I'm not a Mac collector, but I scooped it in case anybody here might be
interested? Free for pickup in Oakland or Menlo Park CA, or for cost of
shipping anywhere else. Drop me a line if interested -- otherwise it'll
be off to the local ecycler in a week or two!
cheers,
--FritzM.
Hi folks,
STC Executel fun continues and I'm at the point where I'm fairly sure code
is running but it's stuck in a tight loop waiting for something to happen.
The 8085A reference tells me a non-memory I/O is signalled by IO/M going
high while it puts the port number on the address bus (0xE3 to 0xE8 in this
case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
then this machine in its current state doesn't do any non-memory I/O - IO/M
is the only signal that stays low. It's not a failed CPU since I have 3
different ones and they all do this.
I've pondered if one of the 3 chips the IO/M signal goes to is pulling it
down; presumably I can test this by lifting the IO/M pin out of its socket
then briefly touching a 1Kohm resistor connected to +5V to the 3 inputs and
watch what the outputs do while the machine is running?
With my little logic analyser on the address bus it's continually active so
it's not a stuck bit either, at least not at the CPU. I can watch the
repetitive patterns while the code runs through 3 delay loops then the
patterns alter while it's off doing....something. All the 4116 RAM chips
seem to be OK too.
I'm also guessing things would be a lot easier if I had a memory map...
Cheers!
--
Adrian/Witchy
Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer
collection?