You know what, I figured it out. I looked to see if there was anything
printed on the cable, and guess what: "Solbourne Computer Inc". I believe
that they manufactured some Sparc clones? In any event, it's definitely a 3
BNC cable and not a 4 BNC.
- Alex
Alexandre Lag?e-Jacques
alexandre.laguejacques at gmail.com
>
>Subject: Re: Minimal CP/M SBC design?
> From: "Roy J. Tellason" <rtellason at verizon.net>
> Date: Sun, 04 May 2008 16:22:33 -0400
> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
>
>On Sunday 04 May 2008 15:57, Ethan Dicks wrote:
>> I am a little unclear, though, about how traditional CP/M systems
>> were set up for ROM and RAM. Was it common to use a "shadow ROM"
>> in low mem at reset, then have the BIOS live at the top of memory?
>> How did 64K RAM CP/M machines handle the BIOS? Did they temporarily
>> ghost the ROM on top of RAM until some bit of code could read ROM
>> and write RAM then bank out the ROM? Since I think I "need" at
>> least 48K of RAM, I was planning on a pair of 62256s. I could easily
>> do 56K of RAM low and 8K of ROM high, I think, unless there's some
>> other arrangement that's obvious to try for a simple design.
>
>I have some amount of docs on that stuff scattered here and there, and am not
>real clear at the moment just where it's all located. I do recall some
>stuff, though. One that comes to mind had the ROM (or EPROM?) mapped in at
>reset, and one of the coldstart initialization routines copied some small
>portion of that up into high RAM. I know that the Osborne Executive had
>3 "banks" one of which had the eprom and video RAM mapped into it. I think
>that some of the TRS-80 machines needed a special version of CP/M because
>they had ROM in low memory and no way to map it out. There were probably
>other variations I'm not thinking of besides.
There were also mod kits for the trs80 to relocate not only the rom but video
and keyboard which were also in low ram.
>> I've never tried writing a BIOS for a CP/M machine, but my understanding
>> is that things are modular enough that once you know what I/O chips
>> you have and at what I/O addresses, for a straightforward, non-clever
>> design, the coding is equally straightforward and non-clever (but please
>> feel free to enlighten me if otherwise).
>
>That's my understanding of it too, though the mechanics of actually putting
>together a bootable CP/M system are something I'm still a bit fuzzy on. I
>probably oughta do that with my BBII one of these days.
I can walk you thorugh it. It really helps to have a PS with a SIM/emulator
like MYz80 or for this and better is Dave Dunfields NS* horizon
emulator. Reason for that is it makes a good development environment,
sources you will need are in the IMD collection for it. For a PC
running something like W98 (later works once you fight with the OS IO)
you can have the simulated Horizon even serial download code from
inside CP/M!
The basic process is to gen (movecpm) up a image of CP/M for the correct
memory size (usually the higest ram address - the size of the bios) and
then take a snapshot of the CCP and BDOS. OR you can get the sources and
run them through ASM for the correct memory size. the result is the same
a BIN file of 5.5K that has a specific load address. Then you can copy
a bios and alter it for your IO The console IO is by far easiest and the
disk (or the disk equivilent) will be a bit more complex. Once you have
a BIOS that can assemble you put the whole mess in a Eprom (orEEPROM)
with a small snippet of code to copy it from ROM to ram at the correct
address and jump to the "COLDBOOT" entry in the BIOS where the code will
Kill rom, init low ram, log in the default disk and put up the intro
screen and prompt. here are bits and peices I didn't explan but that
the overall path.
FYI: while older systems booted the system from disk there is no requirement
nor need for that. If there is enough rom (8k will do) you can put the
whole image in there plus the copy block code.
>I have a fair pile of downloaded files pertaining to this and other
>CP/M-related stuff, what used to be that portion of the files section on my
>old BBS on hand here, I can send you a list of what's there off-list if you
>like.
Most are online with Gaby's http://www.cpm.z80.de/ The Unofficial CP/M site
and likely the most complete archive out there. You can get most everything
you need there and if not the Links are there to the best of the best.
Allison
>--
>Member of the toughest, meanest, deadliest, most unrelenting -- and
>ablest -- form of life in this section of space, ?a critter that can
>be killed but can't be tamed. ?--Robert A. Heinlein, "The Puppet Masters"
>-
>Information is more dangerous than cannon to a society ruled by lies. --James
>M Dakin
>
>Subject: Minimal CP/M SBC design?
> From: Ethan Dicks <ethan.dicks at usap.gov>
> Date: Sun, 04 May 2008 19:57:05 +0000
> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
>
>Hi, all,
>
>I was staring at an SBC I have here with a 6MHz Z-80, some ROM, some RAM,
>and a 26-pin off-board bus for some Z80-PIO boards (this thing was built
>as a multi-parallel-printer switcher). I've been musing about what it
>would take to boot CP/M up on this.
Review:
For cp/m usable [runs apps not merely boot] system you need.
-Z80 any speed.
-56->64K of ram, more is meaningless unless yoru running MPM.
Ram must be from 0000h through at least 32k preferably EFFFH
as most useful apps want 48-56k.
-Boot rom and shadow logic.
-Mass storage (anything that can be made to look like
block addresable storage.)
- console device maybe simple RS232 to terminal(PC with term emulation)
- printer is optional.
- punch and reader devices are rarely needed/implemnted
That is in as fwe words as possible.
>
>For user I/O, I was planning on a console serial port and a terminal/terminal
>emulator. I have IM6402s on hand, but I'd be interested in hearing if
>certain other chips are preferred, based on what BIOS code is floating
>around out there. I also have a 16550, but I don't think I have any
>Z80-SIO chips handy.
If you look there will be a bios for most every thing and none will
match your IO 100% due differnt addresses or disk(or disk equivilent)
used. However.. they can serve as a template.
FYI: a good low parts count IO would be Z80, Z80 CTC (as baud rate gen)
and Z80sio(or DART). Then you can use the AmproLB and others IO for
serial and two ports are handy.
>
>For mass storage, I was planning on either Compact Flash or an SD card.
>I think I've seen both as I googled around for modern SBCs. Any of the
>media I have lying around is plenty large enough (I even have some 4MB
>CFs and a 2.5MB full-sized PCMCIA flash card on hand).
CF is the easiest as the interface is IDE with one feature it does do
8bit transfers. To match the tiny card you can get CF to IDE adaptors
with .100 pin (40 pin) cable IO. As to how much CPM can adress logical
drives to 8Mb and a 32MB CF is 9$ and would partition into 4 drives nicely.
>I am a little unclear, though, about how traditional CP/M systems
>were set up for ROM and RAM. Was it common to use a "shadow ROM"
>in low mem at reset, then have the BIOS live at the top of memory?
>How did 64K RAM CP/M machines handle the BIOS? Did they temporarily
>ghost the ROM on top of RAM until some bit of code could read ROM
>and write RAM then bank out the ROM? Since I think I "need" at
>least 48K of RAM, I was planning on a pair of 62256s. I could easily
>do 56K of RAM low and 8K of ROM high, I think, unless there's some
>other arrangement that's obvious to try for a simple design.
The BIOS needs to be in high ram for the simple case and usually
copied there at boot time. So the boot is rom at 0000 (or made
to appear there for boot) you copy to high ram then kill
(shut off rom) using an IO port bit.
Generally for simplest systems I use 16 or 32K eproms as there
is plenty of space and I can put a monitor and a complete image
of CP/M (CCP 2k, BDOS 3.5k, BIOS typically 1k to 4k). For
somthing kike CF a BIOS will easily fit in 2.5K so the whole
CP/M system image is 8K.
>I've never tried writing a BIOS for a CP/M machine, but my understanding
>is that things are modular enough that once you know what I/O chips
>you have and at what I/O addresses, for a straightforward, non-clever
>design, the coding is equally straightforward and non-clever (but please
>feel free to enlighten me if otherwise).
That's it. Interrupts or other features complicate it some but look at the
CP/M alteration guide for the MDS800 bios example and the Skelental Cbios.
FYI: Cbios is the term for anything other than the "stock" MDS800 bios
with means just about every bios going!
For other example BIOS look up these as I know they are on line:
Compupro
AmproLB
Hal Bower B/P bios (very sophisticated bios)
Andy Johnson-Laird (The CP/M programmer handbook)
Both the basin bios and the enhanced bios from the
book are on line somewhere
And many others.
The bios has a standard layour and defined functionality.
>
>Thanks for any tips, especially from anyone on the list who has ever
>rolled their own CP/M machine.
I've rolled more than a few. If you need info I can help.
Allison
>-ethan
>
>--
>Ethan Dicks, A-333-S Current South Pole Weather at 4-May-2008 at 19:40 Z
>South Pole Station
>PSC 468 Box 400 Temp -74.2 F (-59.0 C) Windchill -105.4 F (-76.4 C)
>APO AP 96598 Wind 7.4 kts Grid 77 Barometer 691.6 mb (10194 ft)
>
>Ethan.Dicks at usap.govhttp://penguincentral.com/penguincentral.html
Ken Seefried wrote:
> From: Jules Richardson <jules.richardson99 at gmail.com>
>>>
>>> As I understand it, the DN10K uses a custom RISC processor and not a
>>> 680x0.
>>
>> Indeed - a88k (not to be confused with m88k) wasn't it?
>
> Not m88k. Totally custom job called PRISM.
No, not m88k. I've always seen them referenced as a88k (to distinguish from
m88k!), but I'd forgotten that PRISM was also an official name for them...
Surprisingly, there's actually a wiki article about the processor:
http://en.wikipedia.org/wiki/Apollo_PRISM
cheers
Jules
Date: Tue, 29 Apr 2008 17:49:41 -0700
From: dwight elvey
> Still a strange problem.
This is past the point where I'd have my logic probe out (if you
don't have one, they're easy enough to make)--and this is a perfect
application for one, as the signals aren't super-fast.
Bring your test up, send a character to get the software into the
state where it quits receiving.
Let's check the static signals first.
Is pin 22 (DSR/) low? If not, check your "null modem" cable and any
level conversion logic upstream from that pin. While you're at it,
check that pin 23 (RTS/) is low so that you can transmit when the
time comes.
Now for the dynamic tests. A logic probe with a "pulse stretcher" is
needed here. Fortunately, most have this feature.
Next, put a probe on pin 3 (RxD) and make sure that it's pulsing with
each character sent.
And then check pin 14 (RxRDY). Does it pulse high with each received
character? If it goes high with the first and stays high, then you're
not retrieving characters after the first.
But if it pulses high only once and then stays low, check your chode.
Somehow, you're disabling the receiver, perhaps as part of the "TOUT"
code. (This is bit 2 of the command word and must be set for the
receive side to operate). The third possibility, that RxRDY pulses
with each received character, says that you're actually picking up
the data and it's not getting echoed back (hint: check the status of
your CTS line).
Let us know what you find.
Best,
Chuck
On Sun, May 4, 2008 12:45 am, der Mouse wrote:
>> 13W3 -> 3 BNC is common in the world of older Sun workstations, in
>> the Sun3 and early Sun4 lines.
>
> It is? I think all the Sun 13W3<->nBNC adapters I've seen have been
> 4BNC or 5BNC, not 3BNC.
Ack, you are correct...I've gotten my old Sun monitors mixed up with my
old SGI monitors.
-Dave
--
Dave McGuire
Port Charlotte, FL
What a pain... My original DEC 1702906-01 (3W3 -> 3 BNC) cable broke and I needed a replacement. I found one on eBay so I bought two. Instead, the seller sent me a 13W3 to 3 BNC!!! (Where the hell does that thing come from???)
I'm trying to contact the seller to work this out. In the meantime, I figured that I'd try here. Would anyone be interested in trading this cable for the one that I really need?
FWIW, what I have in my hands cost about 15$ whereas the going price for the 3W3 to 3 BNC (what I need) is around 50$.
Thanks!
- Alex
Alexandre Lag?e-Jacques
alexandre.laguejacques at gmail.com
You've probably all heard about Chip-Quik--a low-temp soldering alloy
used to desolder SMT at about 150C. Today, I took a scrap board and
decided to try my own version.
Normally, I keep a fair amount of Wood's metal around for bending
thinwall brass tube (filling a tube with the stuff keeps it from
collapsing while bending). WM melts at about 158F (70C) and I
wondered if the considerably cheaper Wood's metal would do the job
that Quik-Chip is sold for.
It does--I just removed a TSOP28 package using nothing more than a
couple of scraps of WM and a 90W PAR38 spotlight to heat the PCB. I
moved the WM around the chip leads a bit and then grabbed the chip
with a bit of silicone putty on the end of a fingerip. The chip came
right up. A little flux might have speeded things up a bit, but I
didn't bother with it. Cleanup was easy--shake the excess metal off
the board, wipe down the pads. I'd probably clean the pads a bit
more if I wanted to resolder a chip there.
Thought folks might like to know. WM is marketed under several trade
names, such as Cerrobend.
Cheers,
Chuck
