test-drb May 2008

test-drb@ccmp.vtda.org

199 participants
350 discussions

by rescue＠hawkmountain.net

I am the 'proud' owner of a VAX 4000/200. I have not tried to do much with it yet, first I'll indicate it's config, then my questions (as I'm 'new' to VAX (I admin'd one for a bit 14 years ago... but I deferred to several folk on campus as I was new to admin'ing VMS and I didn't stay in the role long enough to really pick much up)). M9715-AA VAX 4000 internal card (terminates DSSI and SCSI busses) M7626-AA KA660 CPU M7622-AT 16M Memory M7622-BF 8M Memory M3108-PA DSV11-S 2 Line Sync Comm SI-SC 1000 System Industries SCSI card M3118-YA CXA16-M 16 Async Line M3118-YA CXA16-M 16 Async Line M3119-YA CXA08-M 8 Async Line M3118-YA CXA16-M 16 Async Line M7559-00 TQK70 Tape controller are the cards present (from slot 0? (rightmost slot)) And it has 3 DSSI drives, 2 5.25" RF31 (381M) and 1 3.5" RF36 (in one of the 'rail' sets that will support 2 3.5" drives) (1.6G). the 2 RF31s are ID 0 and 1 the RF36 is ID 2 It also has a TK70. Now onto the questions: 1. How is 24M of RAM ? Should I be on the lookout for more ? 2. What releases of VMS, Vax Ultrix, etc should I limit myself to based on 24M and KA660 ? 3. Was there a DSSI version of TK70 ? 4. 4000/200 does not have SCSI, correct ? (other than someone added an SI SC-1000) 5. any idea if a SCSI CD can be booted via the SI SC-1000 ? (boot cmds would be ?) 6. This is supposed to have some version of VMS on it... I have no PW... pointers to 'break in' procedure and password reset ? What is the default sysadmin account as well ? 7. There is what looks like a 50 pin scsi terminator (small size like Sun 411 case) that I've identified as DSSI terminator., What is the 50 pin centronics style connector above that ? 8. What is a DSV11-S good for ? 9. Not that I plan to, but how do you make use of the async cards (they have 50 pin centronics style connectors) 10. Anyone got any more of the 2 3.5" drive mounting assemblies ? 11. Anyone got any RF36 or higher density DSSI drives available ? 12. Can the DSSI drive 'bus' be converted to SCSI ? 13. What is the largest drive/partitions supported on 4000/200 (DSSI or otherwise) ? 14. Have I asked enough questions ? (What have I forgotten to ask :-) ? ) How are the 4000/200 machines ? (Other VAXen I have is VAXStation 2000 and VAXStation 3100, neither of which is running (driveless))... I find the enclosure design pretty cool... and for a large box, has nice design (visually)... (I know it is no SGI... and that it is DEC beige.... but I like the design (doors, badge, etc)). Any drop in cpu/memory upgrades that are worthwhile (in the free to cheap territory of course :-) ). Thanks in advance for any cool info/pointers/etc... -- Curt

16 years, 7 months

Atari score!

by snhirsch＠gmail.com

I returned from a hamfest yesterday with a mountain of Atari 8bit gear: Atari 800 w/ dust-cover (slight yellowing) (2) 810 diskette drives (2) 1020 Printer/Plotters (1 new in wrapping) 410 Cassette Deck 835 Modem 850 Interface Adapter All original Atari manuals for the above in great condition! All power adapters for the above in working condition. 6 Serial cables Box of assorted joysticks and input devices Huge box of photocopied development tool manuals Still to come as soon as owner unearths them from his basement: Several hundred diskettes SWP ATR8000 CP/M extension system w/ all manuals and software Looks to be a lot of fun getting this stuff up and learning about it. I'm thinking of buying one of the SIO2PC interfaces and the APE software package so I can transfer images from the internet to workable Atari diskettes. Would appreciate any advice or opinions on this. Also, if the owner cannot locate the diskettes, what is the best way to go about bootstrapping things? Where can the various images be found on the net and is APE the best way to do this? Steve --

16 years, 7 months

by austin＠ozpass.co.uk

For my birthday I received a copy of "The Supercomputer Era" by Sidney Karin and Norris Parker Smith. It's a little hard to track down (my copy is ex. Coleman College Library, La Mesa, California - never checked out!) but provides an interesting, nostalgic look at the state of the supercomputer industry c. 1987. The framework for the book is the (then) shiny new San Diego Supercomputer Centre (SDSC). Much is made of the bleeding edge technology implemented at that site, including dual 50Mbit HYPERnet networking to link their Cray X-MP/48 and SCS-40 to the "Common File System" based around an IBM4381 with a whopping 35GB of online storage (20 GB IBM3380 and a 15GB STC8380 disk drives). With 21 years of hindsight whilst enjoying the book, it's quite sad to read some of the predictions. When written, the Cray 3 with its gallium arsenide seniconductors was tipped for great things, and the ETA-10 at the Von Neumann Centre was expected to conquer all. Knowing the eventual direction the supercomputing field took with massive parallel arrays (and clusters) of scalar processors, I really miss the exotic cool of the old-school vector beasts. Reminds me of the famous Seymour Cray quote: "I'd rather have two bulls pulling my plough than 1000 chickens". It's a great read, anyway, if you can get hold of a copy. As an aside (and to provide a little more meat to this rambling post), whilst reading the above and stopping every 5 minutes to follow something up on the interweb I came across a really interesting website detailing "Great Microprocessors of the Past and Present". Apologies if it's common knowledge or has been discussed at length before, but much of it was new and interesting to me. http://jbayko.sasktelwebsite.net/cpu.html -Austin.

16 years, 7 months

Minimal CP-M SBC design

by ajp166＠bellatlantic.net

> >Subject: Re: Minimal CP-M SBC design > From: "Joachim Thiemann" <joachim.thiemann at gmail.com> > Date: Sun, 04 May 2008 22:27:36 -0400 > To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org> > >On a tangent, I am curious: how difficult is it to make some form of >CP/M-68k work on a bare-bones 68000 or 68008 system? Long ago, I did >wire up a 68008 system with leftover chips; but my memory is fuzzy. >Can't even remember if the DTACK grounded trick works on the 68008, or >if I forced access times somehow... > >What does CP/M-68k expect in RAM, ROM and I/O locations? > >Joe. NO idea, the sources are on Gaby's site and likely manuals too. Allison

16 years, 7 months

Minimal CP-M SBC design

by ajp166＠bellatlantic.net

> >Subject: Re: Minimal CP-M SBC design > From: Ethan Dicks <ethan.dicks at usap.gov> > Date: Mon, 05 May 2008 01:25:47 +0000 > To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org> > >On Sun, May 04, 2008 at 09:03:03PM -0400, Andrew Lynch wrote: >> Hi Ethan, I reread your email and thought I'd try to answer some of your >> questions regarding a simple do it yourself CP/M computer. > >Thanks. > >> My first piece of advice is to ask Allison ;-) since she has done this >> dozens of times and can boot CP/M blind folded on a spark gap radio. > >Sure. I was hoping she would chime in. My experience over the years >with CP/M has been somewhat tangental (I've worked on Kapros at work >back in 1980s, I own a couple of Kaypros still, and I've done a little >bit with 22disk and such under MS-DOS), but everytime Allison posts >on CP/M, I learn something. > >> Your basic hardware certainly sounds CP/M capable. I assume that it can >> swap RAM in to the lower pages though, right? CP/M requires RAM at $0000 >> through some address (depends). > >Right. As it stands, the hardware probable cannot do that, but the ace >up my sleeve is that there is a 16V8 GAL that is already wired to important >bus signals so that it can act as the chip select circuit. I was >planning on using one of the output flops as the bootstrap-ROM-enable. >I've done similar sorts of things with MC68000 designs in the past. > >> It likes RAM all the way to $FFFF but can >> live with ROM in the $F000 range. Less RAM than 48K makes things difficult >> though, IMO. > >That's what I was unsure about - but RAM to $EFFF and ROM from $F000 on >up is easy to implement. CP/M doesnt "require" 64K as it's entirely possible to boot and get a prompt with less than 16k. If you wish to run any application with a hint of usefulness you need at least 48k and 56K would be fine so ram to 0f000h serves. I presume the F000h block is rom/Eprom which can be very useful. >> How I implemented my machine was to use a memory configuration latch >> (74LS273)... The schematics are all on my N8VEM page. > >I'll check those out when the sats rise here. > >> A pair of 62256's would work but I prefer a solution using a 512Kx8 SRAM. >> That lets you use the 64K for RAM and the rest for a RAM drive. Whatever >> does it for you though. > >I happen to have some 62256s with me, not any 512Kx8 SRAMs, and the next >plane isn't for almost 6 months. Go with the 32k parts! Hint to save wiring time stack the one atop the other and keep CS/ seperate. Also if you have a 32K eprom you can bank switch that in (do it as low ram/low rom) and you can put CPm and utility stuff in there. >> Writing the CBIOS is actually not that hard. I wrote one more or less based >> on the one in the Andy Laird's CP/M programmers guide book. It was >> recommended by Allison and is *the* reference book AFAIK. CP/M is a great >> OS and is rather portable considering everything it does. > >Hmm... is there a soft copy of that book anywhere? It sounds like the >perfect reading companion. It would be but I know of no on line copy. If you cant cind the on line copies of the bios from teh book I think I have them and can send to pvt email. >> I use 16550 UARTs but the CBIOS abstracts all those details away. I think >> CP/M could care less what sort of serial port you use, even if you use one >> at all. Just implement the CBIOS IO routines and it'll work. Same thing >> for drives; you can use floppy drives, memory, IDE, hard disks, whatever >> from CP/M's perspective they are all block devices. > >Right... but what I _have_ is a choice between a 16550 and a 6402. One >advantage of the 6402 is that its options are hardware selected, so the >bootstrap code doesn't have to do much to be able to squirt out a message >that it's alive. It's probably impractical to put a video circuit on this >design, so I'm going with a serial console in the CBIOS I/O routines >and shifting the burden of display and keyboard input to a dedicated >device. Either will work likely less hardware with the 16550 as it has BRG. >> Best of luck with your project. Let me know if there is anything I can do >> to help! > >Thanks. I still have lots of reading to do, as well as a bit of work to >fiddle up some GAL equations to implement the memory map. It's going to >be somewhat trivial to roll out a 32K RAM/8K ROM design, since there's >already a pair of 28-pin sockets wired up for SRAM and EPROM. The first >big trick will be mounting a second SRAM chip. I do wish I had a 512Kx8 >SRAM with me, but alas, no. > The gal can make life much easier. The larger ramm is nice for MP/M or implementing a soft ramdisk. >I think I have all the parts needed for a ROM emulator, but if not, I >do have a battery-backed 8K SRAM (48Z08?) that I can program in a device >programmer and treat as a ROM for firmware development. At home, I have >a Grammar Engine PromICE, but I didn't happen to haul that along. The ram desive will ge you there. back in the late 70s and early 80s I did it with less (2716 and a home made programmer). > >Thanks for the pointers. I'll check out your project when the 'net >comes up for us. if I can be any help let me know. Allison >-ethan > >-- >Ethan Dicks, A-333-S Current South Pole Weather at 5-May-2008 at 01:10 Z >South Pole Station >PSC 468 Box 400 Temp -69.9 F (-56.6 C) Windchill -103.1 F (-75.0 C) >APO AP 96598 Wind 9.0 kts Grid 41 Barometer 693.6 mb (10119 ft) > >Ethan.Dicks at usap.gov http://penguincentral.com/penguincentral.html

16 years, 7 months

OT: FIB Microscopy Ideas + Request for 7409

by devonstopps＠gmail.com

We recently had a Focused Ion Beam (FIB) microscopy system installed in our lab - which I've just started to play around with. FIBs are used now fairly widely in the semiconductor industry to modify prototype chips - you can etch or deposit metal/insulator at the 100nm scale. Check out fibics.com for some more info; no relation to me. I wondered if anyone had any neat ideas of what to do with it? Both out of interest, and for a demo for some highschool students who will be here on a Nanotechnology course. I de-capped a ceramic 7401 Quad NAND and a 7405 Hex Inverter - with the idea of modifying the functions. However, I can't think of too much to do with either - except maybe trying to separate the input transistor emitter on each hex inverter to make it function as a NAND. Unfortunately these were the only relatively simple chips I had in ceramic packages - I thought turning a 7409 AND into a 7401 equivalent NAND would be neat for the students to see - and at a scale they could easily work with/understand. Does anyone have any 7409 or 7408, or, a similar ECL, DTL, etc AND in ceramic packages they'd like to give up? Control of the system is fully automated; centered around a IBM PowerPC RS6000 43P running AIX.... T.H.x. Devon

16 years, 7 months

Minimal CP-M SBC design

by lee＠geekdot.com

> On a tangent, I am curious: how difficult is it to make some form of > CP/M-68k work on a bare-bones 68000 or 68008 system? I've made a BIOS that seems to work and that fits in less than 2K. The thing I can't seem to do is find all the parts to make up a boot image to let me use a CP/M-68K C compiler to compile the sources to the parts I need to make a boot image. > What does CP/M-68k expect in RAM, ROM and I/O locations? It seems to expect to run in RAM, I/O is abstracted through system calls using TRAP #3 > Can't even remember if the DTACK grounded trick works on the 68008, It does. Lee.

16 years, 7 months

C64 Cartridge disassembly?

by healyzh＠aracnet.com

Strange question, but does anyone know how to get a C64 cartridge case apart without breaking it? I have a bad "Epyx Fast Load" cartridge, and need a case for my "MMC Replay" w/RR-Net. I still haven't really had time to do much with the MMC Replay, I have managed to get a few things to run from it (the C1541 emulation is pretty bad). I have managed to successfully get a DHCP lease for the RR-Net, but haven't gotten it to talk to anything. I finally got some of my floppies back out of storage (put them up on accident just before I bought the MMC Replay, and I want to see about making and writing out D64 images. Zane -- | Zane H. Healy | UNIX Systems Administrator | | healyzh at aracnet.com (primary) | OpenVMS Enthusiast | | MONK::HEALYZH (DECnet) | Classic Computer Collector | +----------------------------------+----------------------------+ | Empire of the Petal Throne and Traveller Role Playing, | | PDP-10 Emulation and Zane's Computer Museum. | | http://www.aracnet.com/~healyzh/ |

16 years, 7 months

Minimal CP-M SBC design

by lynchaj＠yahoo.com

Hi, all, I was staring at an SBC I have here with a 6MHz Z-80, some ROM, some RAM, and a 26-pin off-board bus for some Z80-PIO boards (this thing was built as a multi-parallel-printer switcher). I've been musing about what it would take to boot CP/M up on this. For user I/O, I was planning on a console serial port and a terminal/terminal emulator. I have IM6402s on hand, but I'd be interested in hearing if certain other chips are preferred, based on what BIOS code is floating around out there. I also have a 16550, but I don't think I have any Z80-SIO chips handy. For mass storage, I was planning on either Compact Flash or an SD card. I think I've seen both as I googled around for modern SBCs. Any of the media I have lying around is plenty large enough (I even have some 4MB CFs and a 2.5MB full-sized PCMCIA flash card on hand). I am a little unclear, though, about how traditional CP/M systems were set up for ROM and RAM. Was it common to use a "shadow ROM" in low mem at reset, then have the BIOS live at the top of memory? How did 64K RAM CP/M machines handle the BIOS? Did they temporarily ghost the ROM on top of RAM until some bit of code could read ROM and write RAM then bank out the ROM? Since I think I "need" at least 48K of RAM, I was planning on a pair of 62256s. I could easily do 56K of RAM low and 8K of ROM high, I think, unless there's some other arrangement that's obvious to try for a simple design. I've never tried writing a BIOS for a CP/M machine, but my understanding is that things are modular enough that once you know what I/O chips you have and at what I/O addresses, for a straightforward, non-clever design, the coding is equally straightforward and non-clever (but please feel free to enlighten me if otherwise). Thanks for any tips, especially from anyone on the list who has ever rolled their own CP/M machine. -ethan -- Ethan Dicks, A-333-S Current South Pole Weather at 4-May-2008 at 19:40 Z South Pole Station PSC 468 Box 400 Temp -74.2 F (-59.0 C) Windchill -105.4 F (-76.4 C) APO AP 96598 Wind 7.4 kts Grid 77 Barometer 691.6 mb (10194 ft) Ethan.Dicks at usap.gov <http://www.classiccmp.org/mailman/listinfo/cctalk> http://penguincentral.com/penguincentral.html ________________________________ -----REPLY----- Hi Ethan, I reread your email and thought I'd try to answer some of your questions regarding a simple do it yourself CP/M computer. My first piece of advice is to ask Allison ;-) since she has done this dozens of times and can boot CP/M blind folded on a spark gap radio. Seriously. She is amazing and has helped me many times. Mucho Thank you Allison! Your basic hardware certainly sounds CP/M capable. I assume that it can swap RAM in to the lower pages though, right? CP/M requires RAM at $0000 through some address (depends). It likes RAM all the way to $FFFF but can live with ROM in the $F000 range. Less RAM than 48K makes things difficult though, IMO. How I implemented my machine was to use a memory configuration latch (74LS273). On reset, the ROM is swapped in to the lower 32K page. There is a fixed page of RAM in the upper 32K page. The ROM loader program does some simple copying of data from the ROM to the upper RAM page. Then it writes to the memory configuration latch to swap out the ROM and have a full 64K RAM. The whole thing is amazingly simple. The schematics are all on my N8VEM page. A pair of 62256's would work but I prefer a solution using a 512Kx8 SRAM. That lets you use the 64K for RAM and the rest for a RAM drive. Whatever does it for you though. Some people like the dual 62256's and it does simplify the circuit a bit. Writing the CBIOS is actually not that hard. I wrote one more or less based on the one in the Andy Laird's CP/M programmers guide book. It was recommended by Allison and is *the* reference book AFAIK. CP/M is a great OS and is rather portable considering everything it does. I use 16550 UARTs but the CBIOS abstracts all those details away. I think CP/M could care less what sort of serial port you use, even if you use one at all. Just implement the CBIOS IO routines and it'll work. Same thing for drives; you can use floppy drives, memory, IDE, hard disks, whatever >from CP/M's perspective they are all block devices. Best of luck with your project. Let me know if there is anything I can do to help! Andrew Lynch

16 years, 7 months

duh.... Tektronix 4010 has no microprocessor!

by legalize＠xmission.com

I don't know why I never realized this before, but the Tektronix 4010 graphics terminal is implemented enitrely in SSI TTL logic and contains no microprocessor. I guess that makes sense with it being introduced in 1971, but it just suddenly hit me like a brick. PS: anyone need a 4010 service manual online? I have one and just noticed it hasn't been scanned on the net anywhere. -- "The Direct3D Graphics Pipeline" -- DirectX 9 draft available for download <http://www.xmission.com/~legalize/book/download/index.html> Legalize Adulthood! <http://blogs.xmission.com/legalize/>

16 years, 7 months

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test-drb May 2008