>Please ? Equipment that assumes Neutral (protective ground) = Ground ?
>At least over here this kind of device is _strictly_ forbiddeen since
>>30 years, and I assume it's the same all over Europe. Only machinery
>with distinctive Ground and Neutral or with isolated interior is allowed
>(the wide variety of outlet/plug systems within Europe did support the
>later one a lot, since most are at least compatible for 'hot' and Ground
>pins :).
In all of the UK equipment that I service from one particular manufacturer
they only switch and fuse the one hot lead. The Neutral is "assumed to be
at / near ground so it need no protection. If this is wired to a standard
US residential then you will have no fuse protection on one lead. It will
also be floating when switched off waiting to bite you.
See the following attempt at ASCII art wiring which looks wrong if not
viewed fixed width.
US residendial 240 /120 mains power
_______240V_________
| |
Hot____ Neutral_____Hot
| | |
|__120V___|__120V___|
|
|
|
Ground
This is tied to Neutral
at service entrance ONLY.
>standard voltage (with an upper limit of 120) which comes to 200V (208V),
>and not 220 - and 200 is definitive to low to drive 230V (240V) equippment.
>Not even the old standard 220V Eq will run properly in all cases.
This is where the US confuses people. In commercial 3 phase it is 120 phase
to neutral. 208 phase to phase.
Again with neutral tied to ground at the service entrance ONLY.
Looks like it takes 240v. Can it be changes to 120v I wonder? I'm not really
into micro's, but I do remember the Ohio Scientific stuff vaguely....
Jay
-----Original Message-----
From: Andrew Davie <adavie(a)mad.scientist.com>
To: Discussion re-collecting of classic computers
<classiccmp(a)u.washington.edu>
Date: Monday, April 19, 1999 10:19 AM
Subject: FA: heads up; OSI Challenger 1P
>This is sort of a heads-up. Even though I am the actual "seller", I'm
>really putting this item up for a close friend. I'd buy it myself if I
>could, but I'm in an anti-aquisition mode myself. It's an OSI Challenger
1P
>computer + documentation
>http://cgi.ebay.com/aw-cgi/eBayISAPI.dll?ViewItem&item=93182204
>There are some nice piccies even if you're not interested in bidding.
>HI to all :)
>A
>
>
>
In-Reply-To: <m10YZmF-000IyOC@p850ug1> from "Tony Duell"
You are right, not only _could_ I argue that the FPGA version is
not microcoded; I strongly assert that it is not. (Unless you
meant to have the FPGA be functionally equivalent to the ROM. But
I *think* you meant it to subsume other parts of the processor to
try to muddy the water. Because if the FPGA is just a ROM substitute,
then it is an obvious control store for the microcode.)
No microcode --> not microcoded.
It's just a question of implementation really, not a fundamental
design characteristic. Now, if you make writable microcode, you've
exposed the innards to the programmer, and it becomes a part of
the functional description of the thing. But if you don't do
that, the programmer can't tell the difference; a microcoded and
non-microcoded machine could behave identically.
I'm sure we could carry this to the point that there is a grey area,
but I don't think we're there yet. It's the philosophical problem
of the beard, right? You trim a little off, and it is still a beard.
But if you keep doing that, eventually you get to a point where you
are quite sure there is no beard. Somewhere in between, was there
one atom that you cut off that made it from a beard into a non-beard?
What if you didn't really cut that atom off, but just stretched its
molecular bonds to the limit...?
Of course, it seems to me that so far you've been considering a case
of five o'clock shadow, and wondering it if might be a beard. :-)
I guess, if it has some kind of counter selecting bit-patterns that
control the flow of data in the CPU, I could call it microcoded.
If there is no cohesive place from which such bit patterns are
retrieved, then it is not. (Now, I'm sure you'll make me eat those
words. :-) )
It just struck me that the microcode in a CPU is very much like the
rules of an expert system. The whole point in an expert system is
to isolate the knowledge from the program, so you can tinker with
the former and not get involved in the later. Microcoding lets you
abstract away the complications of the control logic, reducing it
to "these bits at that time-step" thinking, without getting bogged
down in gate propagation delays or chip counts. Lets us programmers
get a little closer to the hardware, without the obvious dangers of
letting us too near the soldering irons. :-O
Ah. There's the grey area. Take all the logic around your state
FF's and registers. Call it a microcode ROM. Of course, the fact
that it is spattered all over your CPU board weakens the argument
that it is a unit in any way, but then maybe you could rearrange
the board to put all that gorp on the left side...
So now I have a fuzzy definition: a CPU is microcoded to the degree
to which the control logic is encapsulated in the form of a control
store. Most real world cases are probably close to 100% or 0%, but
I have no doubt we could construct any degree of set membership that
we like.
I might be willing to stop prattling on about this now. Maybe. :-)
Bill.
On 17 Apr 1999, the Insanely Great ard(a)p850ug1.demon.co.uk (Tony Duell) wrote:
] > Do you mean to say that _all_ computers are microcoded? After all,
] > the control logic can always be modelled by some number of state FFs
] > and a large-enough ROM, couldn't it? Or is your claim that there is
] > no such thing as microcoding? That strikes me as far-fetched as well.
]
] This is the problem. Obviously both of those statements are false based
] on our usual use of the term 'microcoding'. But it's hard to see just
] where to draw the dividing line.
]
] > The difference is that a ROM is easily replaceable; slap in another ROM
] > or EPROM with different microcode burned in, and you've got an entirely
]
] OK, here's a counterexample.
]
] Consider the PERQ. It's microcoded. It's obviously microcoded - there's a
] 16K*48bit _RAM_ that stores the microcode. And there are supplied tools
] to rewrite that microcode.
]
] Now suppose I get a large enough FPGA (I don't think any of the ones
] currently available are large enough, but). I stick it on a board. And I
] provide a tool that does the following :
]
] It takes PERQ microprogram, and combines it with a description of the
] rest of the CPU logic. It then optimises the result, and programs the
] FPGA accordingly.
]
] The result is a processor that runs exactly the same programs as a PERQ
] with that microcode. But you could reasonably argue that the FPGA version
] is not microcoded - you would look in vain for anything resembling a
] control store in the FPGA.
]
] Perhaps the term 'microcoded' should be applied to the original design
] philosophy - if the control logic was _designed_ as a program, then it's
] microcoded.
--- Allison J Parent <allisonp(a)world.std.com> wrote:
> <sort of a "one from column A, two from column B" approach.
>
> Not likely but ther eis anotehr totally different problem, asymetric noise
> pickup masking the cores switching.
I hadn't thought of that. Good point. Another problem is that "worst case"
diagnostics won't necessarily be worst case anymore.
> You're further ahead fixing the mat.
Sigh. It looks like *quite* the challenge.
> The wire used should present little trouble as fine wire can still be had.
Any idea how to estimate the gauge? I know I'd need red and green enameled,
perhaps another color like yellow? I also wonder what they used to insulate
the splices? It appears to be some kind of paint.
> As an aside to this with the lamers trophying the mats. Most often the
> mats are intact so someday they could again be spares.
True.
> The best one I've ever seen was not real but instead used small nuts and
> three colors of wire to make a real looking mat of some 64 or 128 bits.
What size nuts?
> I'd bet that with the right currents and timing you could even store data
> in it.
Oy! The core circuit that I copied for my 12th-grade drafting project used
7.5VDC as the half-voltage. How much oomph would it take to induce a stable
magnetic pattern in a steel nut?!? I would think that enameled insulation
would cook right off the wire.
Anyone with a EE degree and a copy of Spice care to take a stab at it?
-ethan
_________________________________________________________
Do You Yahoo!?
Get your free @yahoo.com address at http://mail.yahoo.com
Okay, I have been able to test the routine, and in fact it did work
first time it executed... It didn't assemble first time because I
had left out a local symbol, but with that corrected it built on the
second try.
In designing the algorithm I used, I noted that converting to Roman
is the same as converting a binary value to decimal (finding the
digit 0-9 for a given power-of-ten) but with the added step of
converting that digit to the appropriate characters for the given
power-of-ten.
The routine has a table of values which are used for successively
subtracting a power of ten from the value until it has a digit 0-9 and a
remainder (which is handled by decreasing powers of ten on successive
passes through the loop). It also maintains a pointer to the current
roman numeral corresponding with the current power-of-ten.
The conversion for 0-3 is easy, it simply outputs the requisite number
of the current roman numeral. For 4, it outputs the current numeral
followed by the numeral one higher. For 5-8, it starts by printing
the numeral one higher followed by 0-3 of the current numeral. For
9, it outputs the current numeral followed by the numeral two higher.
At the end of each loop, the power-of-ten pointer is incremented to
the next entry, but the pointer to the roman numeral is also incremented
by two. This way, the 'current numeral' pointer is always pointing to
'M', 'C', 'X', or 'I'. Since no number in the range which can be
converted required numerals above 'M', I only have to worry about C,
X and I. The numeral one higher than each is, respectively, D, L and V.
The numeral two higher than each is, respectively, M, C and X.
That's it...
I didn't get info on cycles, but I did for number of instructions, which
I included in the comments for the routine.
One last thing - since there are quite a few members in the family
of pdp-11 CPUs, the code is written to run correctly on any one of
them. There are no restrictions, so using the T-11 (as I think
Allison mentioned) would be possible.
Megan Gentry
Former RT-11 Developer
+--------------------------------+-------------------------------------+
| Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry(a)zk3.dec.com |
| Unix Support Engineering Group | (home): mbg(a)world.std.com |
| Compaq Computer Corporation | |
| 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ |
| Nashua, NH 03062 | "pdp-11 programmer - some assembler |
| (603) 884 1055 | required." - mbg |
+--------------------------------+-------------------------------------+
- - - - -
.SBTTL CVBTAR - Convert Binary to Ascii Roman Numerals
;+
;
; Copyright (c) 1999 by Megan Gentry
;
; CVBTAR
; Converts a binary value to string of ascii characters which
; represent the value in Roman Numerals.
;
; Call:
; R0 = Binary value to convert
; R1 -> Storage space for resulting string (nul-terminated)
;
; Returns:
; R0 = zero
; R1 -> Byte beyond end of nul-terminated string
; other registers are unaffected as they are saved and restored
;
; Notes:
; o Valid range for input is 1 to 3999.
; o Roman numerals are:
; M 1000
; D 500
; C 100
; L 50
; X 10
; V 5
; I 1
;
; 60 words (120 bytes) of code
; 5 words (10 bytes) of data
; 7 bytes of text
; 3 words (6 bytes) of stack used
;
; Code ROMable: yes
; Data ROMable: yes
; Code Reentrant: yes
; Data Reentrant: yes
; Undefined opcodes: no
; Undefined behaviour: no
;
; Value Instructions executed
; 0 5
; 4000 7
; 1 78
; 3999 185
; 3888 220
;
;-
.PSECT .CODE.
.ENABL LSB
CVBTAR:
; Range check the input
TST R0 ;Is it valid?
BLE 100$ ;Nope...
CMP R0,#3999. ;Maybe, check upper limit...
BGT 100$ ;Nope...
; Save registers and do some setup
MOV R2,-(SP) ;Save R2
MOV R3,-(SP) ; and R3 while they are used
MOV #BTDTAB,R2 ;R2 -> Decimal conversion table
MOV #ROMCHR,R3 ;R3 -> Roman numeral character list
BR 20$ ;Just starting conversion...
; Head of the loop
10$: TST @R2 ;End of the conversion table?
BEQ 90$ ;Yep, conversion should be complete
20$: MOV R0,-(SP) ;Save current binary on stack
CLR R0 ;Reset R0 for conversion
30$: INC R0 ;Bump count for this digit
SUB @R2,@SP ;Reduce by current factor of 10
BHIS 30$ ;Continue if still positive...
ADD (R2)+,@SP ;We went too far, add it back
; (and bump conversion table pointer)
; remainder is still on stack
DEC R0 ;Reduce the count
BEQ 80$ ;If zero, no characters to output
; Here we convert the decimal digit to Roman Numerals
CMP R0,#9. ;Is it a nine?
BNE 40$ ;Nope...
MOVB @R3,(R1)+ ;Yes, it converts to current numeral
MOVB -2(R3),(R1)+ ; followed by the numeral two higher
BR 80$
40$: CMP R0,#4. ;Is it a four?
BNE 50$ ;Nope...
MOVB @R3,(R1)+ ;Yes, it converts to current numeral
MOVB -1(R3),(R1)+ ; followed by the numeral one higher
BR 80$
50$: SUB #5.,R0 ;Is value five or greater?
BLT 60$ ;Nope, in range zero to three
MOVB -1(R3),(R1)+ ;Yes, prefix with one higher numeral
SUB #5.,R0 ; followed by one to three current
60$: ADD #5.,R0 ;Return value to range zero to three
BEQ 80$ ;It was zero, nothing to do...
70$: MOVB @R3,(R1)+ ;Store a numeral
DEC R0 ;More to do?
BGT 70$ ;Yep...
; Tail of the loop
80$: ADD #2,R3 ;Bump the numeral pointer by *2*
MOV (SP)+,R0 ;Pop the remainder (already popped
; the power of ten pointer)
BNE 10$ ;More conversion to do if non-zero
; Clean-up
90$: MOV (SP)+,R3 ;Restore previously saved R3
MOV (SP)+,R2 ; and R2
BR 110$
; Out-of-range string
100$: MOVB #'*,(R1)+ ;Out-of-range conversion string
; String termination and return
110$: CLRB (R1)+ ;String is to be nul-terminated
RETURN
.DSABL LSB
; Conversion data
.PSECT .DATA.
; Binary to decimal conversion table
BTDTAB: .WORD 1000.
.WORD 100.
.WORD 10.
.WORD 1.
.WORD 0 ; ** Table Fence **
.PSECT .TEXT.
; Roman Numerals (1st, 3rd... entries match entries in BTDTAB)
ROMCHR: .ASCII /MDCLXVI/
.EVEN
.END
>> Well I was at an American run management course last year in Newcastle. One
>> of the (male) attendees made the comment that he was cold and that he was
>> going to get a jumper. This caused a hysterical reaction by one of the
>> female presenters - apparently from her part of the USA a jumper is a dress!
>
> Farzino, a "jumper" is a dress anywhere in the US, specifically a
> dress of a style rarely worn once puberty kicks in. Possibly the
> standardisation of that nomenclature resulted from the fact that
> that's what was used in the old Sears-Roebuck catalogs that were
> distributed nationwide.
That sounds like what I would call a "pinnafore dress". In the UK a Jumper is
usually a sweater. The only exception I have met was in the _Manual of
Seamanship_, published by the Admiralty in (I think) 1938, where it lists the
kit issued to sailors, with illustrations. There the sweater is called a
"Jersey", and "Jumper" refers to something resembling a football shirt. Well,
the top half of a sailor suit anyway :-)
Philip.
I was just wondering (mainly for refreshment purposes) if any
ListMembers in the Southern California area who might be thinking of
gathering at my place after TRW for a vintage computer crawl...
might drop me a line or mention you are interested... I have
somewhat limited parking as well, and I was just trying to get an idea.
If any SoCal Classiccmp List Members are reading this and haven't
yet read the previous invitations, I am sponsoring a Vintage
Computer Collection open house this saturday... e-mail me for
details or see previous messages.
Cheers and Thanks!
John
-----Original Message-----
From: Hans Franke <Hans.Franke(a)mch20.sbs.de>
To: Discussion re-collecting of classic computers
<classiccmp(a)u.washington.edu>
Date: Tuesday, April 20, 1999 4:49 AM
Subject: Re: z80 timing... 6502 timing
>> Some things in this contest that sound reasonable to me;
>
>> Input and output are to memory resident buffers.
>
>> Inline code is too boring, and subrountine calling too important, so the
>> "task" should require perhaps modules; maybe make the contest half a
dozen
>> subroutines which get called from a contest defined main program (using
>> some typical non asm language like C or pascal).
>
>> Contest submissions could be a simple binary file, file length,
predefined
>> jump table for subroutines, the actual code. Some third party, can run
the
>> code and time it on the hardware of their choice.
>
>Nice, but with these things, like internals of the system for input/output,
>binary and similarities, you tie again all down to a single system to
>use - we loose the idea of a cross platform competition where only basic
>processor features are measured (see also the subject).
>
>Gruss
>H.
>
>--
>Stimm gegen SPAM: http://www.politik-digital.de/spam/de/
>Vote against SPAM: http://www.politik-digital.de/spam/en/
>Votez contre le SPAM: http://www.politik-digital.de/spam/fr/
>Ich denke, also bin ich, also gut
>HRK
In a message dated 20/04/99 10:35:53 Eastern Daylight Time,
george(a)racsys.rt.rain.com writes:
<< In the mean time I notice the ebay bid is up to $180. I wonder what a
c4mf or a c8df would fetch?
George >>
harrumph, even an IBM pc convertable (5140) was up to ~$120 yesterday! i knew
i shoulda bought that one i saw last week for cheap...
>that were clearly under 1.4kw. The codes are aimed at providing reasonable
>power. Here a 15A/115v is the nominal and 115V/20A is a max
No, it isn't. I have several 115V 30A circuits in my computer room -
this being an extremely common rating on the power controllers used
in smaller DEC systems - and looking at the codes and the Hubbell catalog
it would seem that 60A circuits are standard things as well.
--
Tim Shoppa Email: shoppa(a)trailing-edge.com
Trailing Edge Technology WWW: http://www.trailing-edge.com/
7328 Bradley Blvd Voice: 301-767-5917
Bethesda, MD, USA 20817 Fax: 301-767-5927
