At 09:22 AM 11/17/97 -0600, you wrote:
>> excellent PS/2 '87 era series that can be ripped apart with bare
>> hands except for motherboard and PSU screws.
>
>FWIW, my absolute favorite box of all time is the VAXstation 4000/60 or /96;
>you can get everything out of the box quickly with no tools. In contrast,
>it's only been in the last few years that I've gotten coordinated enough to
>keep from mutilating my knuckles every time I go into a VAXstation 2000...
I dunno if it's my favorite, but I do like the Mac IIci (intro'd in '89 --
almost 10 years) beacuse it too comes apart with no tools (mostly.)
My first computer, the Atari 600XL was great because the cartridge slot was
in exactly the right position to use it as a handle.
The one downside of the m100 is it had no handle, nor did it's little
slipcover. (And the RS blue case was too expensive -- then; I've got one
now.)
Any other thoughts on case designs? I still think the Lisa was beautiful,
and I'll have to check out the 3b1.
--------------------------------------------------------------------- O-
Uncle Roger "There is pleasure pure in being mad
sinasohn(a)ricochet.net that none but madmen know."
Roger Louis Sinasohn & Associates
San Francisco, California http://www.crl.com/~sinasohn/
<Take that 800 mA pulse, and multiply it by the length of all the wires
<hooked to each drive line. What you end up with is a rather good radiator
<of high-frequency hash! Many machines housed the entire core assembly,
<including drivers, in a different box than the CPU for this reason.
<PDP-8/E's and -8/F's, where the memory does sit in the CPU box, have a
<special shielding card that segregates the memory from the rest of cards
<to keep this hash out of the CPU circuitry.
also to keep out of local TVs. Some of the core systems were boxed to keep
a constant temperature as ferrites are temerature sensitive.
Allison
<800mA to switch! Ouch! No wonder the PSU was so bulky.
Actually its 800ma per bit, the half select lines were some 400ma each
plus sense inhibit signals. A large memory could easily be in the several
tens of amps with all the surrounding logic. Typical power systems for code
machines were very robust and heavy.
<Truth. Trying to time right time to catch the bounce back and avoid
<the read pulse that is there on the sense wire. Yeah, it's read in
<serially fashion because that one wire is strung back and forth
<through all cores just once. You have to fashion the circuit to
<retore the orignal bits because the read process destroys the data.
Sensing the read data is fairly easy as it will occur in a fixed point
(all other things being constant) in time after the coincident
select pulse. Coincident selection takes half the total current needed
to switch the magnetic state of the core and divides it between two wires
of the matrix where the two coincide is the selected core and the resulting
magnetic field causes it to switch state. Writing is a matter of causing
it to switch to the reverse state.
ONE core in a larger array. Typical arrays are 16x16 or 64x64. A memory
typically would contain many arrays organized as 4096 by 12 or 4096 by 16
or wider and possibly larger. One such machine the MIT/Lincoln TX2 had
a main memory of 65536 38 bit words (2.5megabits).
\ /---inhibit wire
\|/
-----+----X SELECT wire
/|\
/ | \-----sense wire
y
--SELECTwire
This is a single bit of a core plane, the + could be a doughnut of ferrite
that can be magnetized in either direction depending on direction of
current. The sense wire as that is a serpentine single wire that goes
through each core. It's routing is such that for half the plane its
sense is reverse to suppress induced noise from the select wires. Some
planes use a forth wire threaded in the same way as an inhibit. Inhibit
is so a one or zero representation can be forced. So we can select a core
and read it's results and the selection process is in effect and erasure
meaning we have to put back data. Reading is done by selecting a core
using the X and Y select lines with thenough current to make the core
magnetic filed to change if it was previosly different. This
change or lack there of induces a current in the sense wire that we
can detect. If there is no change in the magnetic field there will be a
small pulse if there is a change in the field there will be a bigger pulse.
Comparators are used to compare that pulse to a known reference and if big
enough sends a pulse on to a latch (flipflop) to save that. Writing is
like reading we select a core with the currents reversed to force the
magnetization the other way, if we do not want to write we also force
current through the inhibit wire so that it counters the magnetic field of
the selection and inhibits the reversal.
Before more detail is given it's sufficient to say that a core memory
system is actually a goodly portion of the then current computers timing
and cost. I have only glossed over the reson core works and the logic
to do so is fairly involved as it requires sequential activities to occur
precisely every time and at the correct time.
Yes, core is destructive read out and the data read out must be stored
written back. Most CPUs of the time would do a read/modify/write to
take advantage of that. Living exampes of that include PDP-1 through
PDP-11, TI990 and I believe NOVA.
There is a whole class of logic that uses cores to propagate logic pulses
and even perform logical operations on combinations of pulses. Cores have
inherant memory from teh magnetization. There was a few computers built
to exploit that and had few active devices(transistors or tubes). They
are faster than relays but slower than tube or later transistor cicuits.
Allison
A whole lot, and all of it for $20!
Any info on these appreciated.
So, how close am I to building a 780? :)
PDP-8
M8320 BUS LOADS
M8315 KK8-A OMNIBUS CPU, 8/E INSTRUCTION SET
M8317 OPTION BOARD #2, MEM EXT & TIMESHARE, BOOTSTRAP, PWR FAIL
START
SOME UNNUMBVERED VAX NETWORK BOARD, INTERFACED TO A APOLLO.
M7769 KFQSA. (A SCSI adpater?)
UNKNOWN:
M8013 RLV11 DISK CONTROL
X2 M8014 RLV11 BUS CONTROL
EMULEX SC03
EMULEX TC12
X2 EMULEX CS02
DLV11-J (I know what THIS is!)
M7138 QBUS TO LASER PRINTER DMA INTERFACE MODULE
VAX 780:
X3 M8210 32K X 72BIT MOS RAM [MS780]
M8212 MS780-A MDT MEMORY DATA
M8218 KA780, SBI LOW BITS INTERFACE
M8226-C KA780, DEP, CPU DATA PATH E
M8227 KA780, CPU DATA PATH D
M8228 KA780, CPU DATA PATH C
M8229 KA780, CPU DATA PATH A
m8230 KA780, CEH CONDITION CODES, EXCPETIONS, HI BITS
M8231 KA780, ICL, INTERRUPT CONTROL, LOW BITS
M8232 KA780, CLK, CPU CLOCK
M8233 KU780, WCS, WRITABLE CONTROL STORE
M8234 KA780-A, PCS, PROM CONTROL STORE
M8236 KA780, CIB, CPU CONSOLE INTERFACE
M8238 KU780-A, 2K WCS
X2 M8270 DW780-A USI, UNIBUS ADAPTER SBI INTERFACE
X2 M8271 DW780-A, UNIBUS ADAPTER CONTROL
M8272 DW780-A UNIBUS ADAPTER MAP & DATA PATH
X2 M8273 DW780-A, UNIBUS ADAPTER ADDR
m9040 11780, TRM SBI TERMINATOR
VAX ???
L0007 11/750 MBA MASSBUS ADAPTER
X8 L0200 4MB MOS ARRAY [MS86]
X3 L0222 (MTM) MEM ARRAY TERMINAL BOARD [KA86]
L0224 SBI/A-BUS TERMINATOR [KA86]
X2 L0104 SBI INTERFACE FOR CI PORT
L0100 CI LINK INTERFACE
L0101 IPB (CI CONTROL STORE + PKT BUFF)
L0201 CONSOLE CONTROL KA86]
L0204 MBOX DATA PATH [KA86]
L0206 IBOX DATA PATH [KA86]
X2 L0207 IBOX CONTROL A [KA86]
L0208 IBOX INST BUFF [KA86]
L0212 SBIA SBI INTERFACE [KA86]
X2 L0214 IBOX CONTROL B [KA86]
L0215 CSA CONTROL STORE ARRAY [KA86]
L9200 MEM LOAD FOR 8600
Whew!
<Are there any obvious choices of better cores for a simple homemade
<core plane? I might try playing with steel 0-80 (and smaller) nuts
Permalloy was a common one and the size was generally 50 mils or smaller.
TX2 used this with 80mil od and 50 mil ID, it switch time was 1uS and
required 800ma to switch and yeilded 100mv if it switched. There was
no data given if it didn't switch but I'd bet 20mv would be believable.
Cycle time for a memory with cores like that would be 3-5us. The TX2
ran them at 5uS.
Other materials can be used but a good sharp B-H curve is desired and
saturable ferrites were used for the smaller 30-40 mil cores. Saturable
ferrites are used in power conversion in current designs so they exist.
There is a relationship between core size, material and speed.
<this weekend, but I doubt they'll be particularly good - probably it'll
<take a rather sizable current*turns product to magnetize these.
Turns are 1, and the current from some of the older stuff was around
400-800ma and the smaller later stuff in the 100-200ma region.
<Assuming I do find a readily available material that works, would others
<be interested in a write-up about building your own core memory plane?
<I'm envisioning circuitry to allow one to toggle in bits to various
<locations and read them out again. The logic driving it is likely
<to be simple TTL (maybe some 74LS138's or 74154's for X-Y decoders)
<plus some analog electronics for the drivers and sense/inhibit
<circuitry. If I'm clever enough, it'll be be doable with readily
<available (i.e. Radio Shack) parts.
This would be interesting. Additionally if it could be applied to some
of the core planes out there with ??? characteristics and origins it may
help. there was an article written back in the late 70s in BYTE on using
CC core memories.
FYI the TX2 used 64x64(4kbit) core planes for main memory to make a larger
256x256x38 bit memory. The fast memory(registers) were 64x19bits using two
cores per bit (bigger signal less noise). the array was 8x8 using 128
cores.
A small 8x8 or 16x16 array would be trivial to wire and drive. It's the
timing for the read pulse and keeing noise out of things that is twitchy.
Allison
> From: Philip.Belben(a)powertech.co.uk
> Subject: Re[2]: Talk Of Building A Computer...
(Don't react until you read this first part through:)
You can of course never build a real classic computer, by definition its
not a real classic unless its really old and was built by people who
were, at the time, working with state of the art components and
techniques. Part of the attraction of the old machines is that they
subtly document the skills, preconceptions and ignorance of their
designers and the prevailing conventional wisdom. Another part of the
attraction is to have a piece of equipment that has been in existence
for so long and still works.
So the best you could ever do is come close. Any attempt will be a
compromise of some sort, so an interesting question is how close is
close enough? The closest I think is to attempt to exactly recreate a
particular early machine. Chris Burton is doing this with the Manchester
SSEM and Tony Sale with the Colossus, both with significant help from
other folks in the Computer Conservation Society. I've seen them in
progress, they are both fabulously, meticulously accurate (as far as I
can tell) and very nearly as much fun as if the original machines still
existed. And despite all the help they are largely one-man projects, or
could have been, which shows that its actually possible to consider
doing it "right" by yourself if you have the time. Sort of like building
a boat or an airplane. People can do that.
All this having been said, I'm sure you feel as I do that it would be
fun to build a machine in the classic style but an exact recreation is
too much. So how authentic do you have to be? My point is this -
*** Its up to you ***.
Since any such project is necessarily a compromise, the exact tradeoffs
are not really important. Your project should reflect what you want from
it, other people's opinion doesn't matter unless its a group effort.
Here are a some projects I personnally find interesting:
1. A small Williams-tube memory. Designed and built from scratch using
6SN7's and a common 5" oscilloscope CRT like maybe a 5GP1.
(Chris has beaten me to this but it doesn't matter - for that matter,
Williams beat us both; the fun part is doing it yourself.)
2. A complete 32-bit CPU and memory in the classic style, an accumulator
machine, built in just 4 parts: a FPGA, DRAM, EPROM and clock. This is
easily possible with existing technology. It would also have a 2.5" IDE
disk drive for mass storage and a small printer and keyboard for user
I/O. It would be fun to do and would demonstrate the incredible
miniaturization of electronics when compared with my room sized IBM
7094.
3. Emulators for all my old machines, and machines I wish I had. This is
the only project I've actually made any progress on.
So do what you find most compelling.
--------------------------------------------------------------------
Here are some thoughts on the current proposal (building a machine in
the classic style of a tube machine but with discrete transistors to be
more practical), some of these reinforce comments others have already
made:
Your main problem is not the logic, it is the memory. There is no old
memory that is anywhere near as easy to use as, say, SRAM. Your major
choices are core, magnetic drum/disk, or delay line. Core is going to be
a lot of work. Drum or disk will require expertise in mechanical
fabrication but is pretty attractive otherwise. Acoustic delay line (the
only kind with reasonable capacity) may be best but will require some
research and experimentation. I would recommend magnetostrictive wire
acoustic delay line memory if you can figure out how to build it and
don't mind having a very small memory.
About the logic, while very early tube circuits were strange using
multiple grids, in most tube computer circuits the actual logic was done
with diodes. The tubes then invert and drive the next stage. Flip-flops
were used for temporary state storage and sometimes for registers. A
very common computer tube in the US was the 5965 dual triode. To see
some IBM 705 circuit drawings (all but the inverter, which apparently
wasn't used much in this machine but was used in others such as the 709)
look at http://www.teleport.com/~prp/collect/705dwg/
The diode/tube logic translates very nicely into common early transistor
circuits such as RTL, RCTL and DTL.
For a project like this I would recommend building a serial accumulator
machine, one which works on one bit at a time and has a single
architecturally visible register, like the PDP-8. It will have much less
logic than a parallel or multiple register machine and will be very
classic. A serial CPU will be a good match with serial memory such as
drum or delay line memory. A good, pretty clean example is the Royal
McBee LGP-30. Better is the SWAC which had a very good clean minimal
architecture but was parallel, a serial version would be pretty easy.
Note that small tube machines like the LGP-30 and Bendix G-15 have only
around 300 tubes.
To get an idea of how big it would be, the Packard Bell PB250 (see
http://www.teleport.com/~prp/collect/mini.html ) is just what I've been
talking about - serial, transistors (RCTL) and delay line memory. It
takes up half a 19" rack, same as a PDP-8 but I think the logic is
physically less dense. About a quarter of the volume is taken up by the
memory.
Paul
At 05:56 AM 11/21/97 +0000, you wrote:
>Okay.... possibly keyboard, but probably HDD. I tried my current keyboard...
>it's a Windows 95, and I still got that error.
Try <http://www.searchlight.com/$WEBMSG.Read.SLBBS-R.3631.read> -- it's a
listing of the various POST (Power-On Self Test) error codes. (Or, do a
search at AltaVista (<http://altavista.digital.com/>) on <"power on self
test" and error> (with quotes, no <>'s.))
--------------------------------------------------------------------- O-
Uncle Roger "There is pleasure pure in being mad
roger(a)sinasohn.com that none but madmen know."
Roger Louis Sinasohn & Associates
San Francisco, California http://www.crl.com/~sinasohn/
> > You mean, there's still another educational institution that uses VAX
> > Notes as a major means of mass communication?
> >
> > What's your mailer?
>
> One thing, Notes is kind of internal "newsgroups" that you can
> subscribe while as authorized users logged on there.
I know all about it. I'm required to use it daily, both for work and for
class. I was just surprised to hear of a fellow Notes-user.
> The vax email
> program that you write and reply to is PMDF and has POP3 server as
> well.
We have no POP server here (or we do, but we have no dialup PPP service,
so it's useless unless you're connected to the network). We use Dreams as
an interface to PMDF, which has its nice features.
> Also it has newsgroups reader on there but it's too clumsy and
> hard to use.
SLRN can be compiled under VMS (at least, 0.9.0.0 could be). I find it a
lot easier to use than NEWSRDR.
--
Ben Coakley http://www.math.grin.edu/~coakley coakley(a)ac.grin.edu
Station Manager, KDIC 88.5 FM CBEL: Xavier OH
It is good to rock. It is very good to rock wearing a big ass pumpkin on your
head. It is very, very good if that pumpkin is on fire. --Jessica Stern
<> > You mean, there's still another educational institution that uses VAX
<> > Notes as a major means of mass communication?
<I know all about it. I'm required to use it daily, both for work and for
<class. I was just surprised to hear of a fellow Notes-user.
<
<> The vax email
I have VAXnotes up and running on my collection of vaxen here. Trying to
workup CMUip slip or slirp.
What I like about Vaxnotes was you coul have public conferences or private
authorized people only conferences.
Allison
