13 Jul
2014
13 Jul
'14
9:44 p.m.
Hi all,
I've implemented a DG NOVA in Verilog, at the current state it
implements all basic instructions, the only
thing the main CPU is lacking is interrupt support which I will add when
I have the time.
The main problem with the whole thing is the sheer lack of any OSes
aside from RDOS.
It would be nice if anyone had some smaller/more basic OSes or
bootstrappable standalone diagnostic software for me to test things with.
(RDOS when manually loaded into memory executes until it tries to load
something from disc, which I haven't yet implemented)
The Verilog is synthezisable, aside from the IO debugger, Disassembler
and device 077 which is currently hacked together.
You can find some documentation and download here;
http://janadelsbach.com/nova.html
- Jan
13 Jul
13 Jul
10:09 p.m.
On Jul 13, 2014, at 21:44 , Jan Adelsbach <jan at janadelsbach.com> wrote:
I've implemented a DG NOVA in Verilog, at the
current state it implements all basic instructions, the only
thing the main CPU is lacking is interrupt support which I will add when I have the time.
Now that's pretty cool!
--
Mark J. Blair, NF6X <nf6x at nf6x.net>
http://www.nf6x.net/
14 Jul
14 Jul
2:51 p.m.
On 7/13/2014 9:44 PM, Jan Adelsbach wrote:
Hi all,
I've implemented a DG NOVA in Verilog, at the current state it
implements all basic instructions, the only
thing the main CPU is lacking is interrupt support which I will add
when I have the time.
The main problem with the whole thing is the sheer lack of any OSes
aside from RDOS.
It would be nice if anyone had some smaller/more basic OSes or
bootstrappable standalone diagnostic software for me to test things with.
(RDOS when manually loaded into memory executes until it tries to load
something from disc, which I haven't yet implemented)
The Verilog is synthezisable, aside from the IO debugger, Disassembler
and device 077 which is currently hacked together.
You can find some documentation and download here;
http://janadelsbach.com/nova.html
- Jan
Jan,
I am looking over and saving off your project to work on with what I
have and got sidetracked into the assembler, and also a nice looking PDP8e.
I see list member Toby Thain's assembler works on the latest ubuntu. He
has apparently targeted it to compile and run on a lot of systems which
is great.
Thanks for your work. I will hopefully get into it someday. I'm mainly
collecting these sorts of bits to learn about the Verilog and also want
to eventually model a couple of systems I am familiar with. These
efforts help me a lot in how the approaches are done and what they do.
I'm hopefully going to get the Microdata 1600 going someday, and the
Nova is much closer to the 1600 micro architecture than a lot of other
examples.
thanks
Jim
Jim
15 Jul
15 Jul
8:48 p.m.
New subject: Open source Nova 3 assembler - was Re: DG NOVA in Verilog
On 14/07/14 5:51 PM, jwsmobile wrote:
On 7/13/2014 9:44 PM, Jan Adelsbach wrote:
Haha, thanks for the compliment. I can always do better though. I
haven't looked at that code in some time, so if anyone has any problems
with it, let me know and I can take a look. At least I have a range of
systems to test on here (OS X ppc, OS X intel, linux, Solaris 10, etc).
Also, it's grizzly old Subversion. I could move it to github sometime.
http://telegraphics.com.au/svn/dpa/trunk/
--Toby
Hi all,
I've implemented a DG NOVA in Verilog, ...
You can find some documentation and download here;
http://janadelsbach.com/nova.html
- Jan
Jan,
I am looking over and saving off your project to work on with what I
have and got sidetracked into the assembler, and also a nice looking PDP8e.
I see list member Toby Thain's assembler works on the latest ubuntu. He
has apparently targeted it to compile and run on a lot of systems which
is great. ...
Jim
14 Jul
14 Jul
3:19 p.m.
On Sun, Jul 13, 2014 at 11:44 PM, Jan Adelsbach <jan at janadelsbach.com>
wrote:
Hi all,
I've implemented a DG NOVA in Verilog, at the current state it implements
all basic instructions, the only
thing the main CPU is lacking is interrupt support which I will add when I
have the time.
The main problem with the whole thing is the sheer lack of any OSes aside
from RDOS.
It would be nice if anyone had some smaller/more basic OSes or
bootstrappable standalone diagnostic software for me to test things with.
(RDOS when manually loaded into memory executes until it tries to load
something from disc, which I haven't yet implemented)
The Verilog is synthezisable, aside from the IO debugger, Disassembler and
device 077 which is currently hacked together.
You can find some documentation and download here;
http://janadelsbach.com/nova.html
Nice work. I wrote an implementation in VHDL a year or so ago for a school
project. I had to modify it slightly to fit the project description, but it
could execute a large subset of the code. I may go back and finish that up.
It didn't yet support interrupts or IOTs.
You should upload it to OpenCores (http://opencores.org/projects) as I
noticed there is a deficiency in DG cores there.
Kyle
3596
days inactive
3598
days old
4 comments
5 participants
participants (5)
-
jan＠janadelsbach.com -
jws＠jwsss.com -
kylevowen＠gmail.com -
nf6x＠nf6x.net -
toby＠telegraphics.com.au