27 Feb
2002
27 Feb
'02
9:58 a.m.
On Feb 27, 22:48, Andreas Freiherr wrote:
RX02s are usually formatted with the physical sectors in strict order, so
software interleave is used.
Possibly. But if you work it out completely, I think you'll find you save
very little. Not all of the tests are checking for an error, either.
Also, the last three locations are slightly different,
but this
shouldn't present a problem:
2130 005000 CLR R0
2132 005007 CLR PC (my favourite PDP-11 instruction, really!)
2134 000000 HALT
I've seen one like that too.
> sectors, not two. The reason for missing the
even-numbered sectors is
> because they are software interleaved to give time for the memory
transfers
between reads.
I thought this is done by spacing the sectors on the disk surface (like
1, 13, 2, 14, etc.) and having drive electronics deal with the sector
number from the preamble? Consequently, this would be a property of the
floppy that would be implemented when the media was formatted. > Some versions actually have the HALT elsewhere.
I once spent ages
trying
to work out
the shortest variation on this bootstrap, IIRC I managed to
save just one word.
I think more significant savings could perhaps be obtained by
initializing a stack at the beginning and then using a subroutine like
WAITRX: BIT R0, (R1)
BEQ $-4
BMI ABORT
RTS PC
ABORT: HALT
to wait for any of the TR, ERR or DONE bits to come up, instead of
repeating these instructions every time. Since you never set the INTR ENB bit in the RX2CS
register, you just
need to keep your fingers crossed so no other device will issue an
interrupt request... ;-)
Yes :-)
Yes. But this is neither a typo nor a printing error.
If you read four
blocks of 200(8) _words_ each, starting at zero, you fill exactly
2000(8) _bytes_, and the next free location is 2000(8). As you state,
the printed version is prepared for conversion to single density (by
clearing the 400 bit in locations 2036 and 2072, right?) by reading in
four blocks... - So, the reason is somewhat similar to that for the
TS-11.
Yes, but if it's single density, which is the only reason you'd read four
sectors, the sectors are 128 bytes [100(8)] not 256, so it's still only
1000(8).
--
Pete Peter Turnbull
Network Manager
University of York
27 Feb
27 Feb
8:04 p.m.
Pete,
understand or agree with all you say. Except:
Sure, you need not read four sectors if they are 200 words each, but as
we noted earlier, the routine will always read these four sectors (so
you need only change two words in order to switch to single density),
and if these four sectors happen to be from a double-density RX02, you
will want to have sufficient room for them.
My guess is they left it that way (reading up to sector #7 and having
the bootstrap at location 2000) to be sure nobody will forget to change
the sector count when switching single / double density. It doesn't take
that much time to read the additional two sectors, and it doesn't happen
too frequently - after all, this is neither DOS nor Windoze! ;-)
Yes. But this
is neither a typo nor a printing error. If you read four
blocks of 200(8) _words_ each, starting at zero, you fill exactly
2000(8) _bytes_, and the next free location is 2000(8). As you state,
the printed version is prepared for conversion to single density (by
clearing the 400 bit in locations 2036 and 2072, right?) by reading in
four blocks... - So, the reason is somewhat similar to that for the
TS-11.
Yes, but if it's single density, which is the only reason you'd read four
sectors, the sectors are 128 bytes [100(8)] not 256, so it's still only
1000(8). Possibly. But if you work it out completely, I think
you'll find you save
very little. Not all of the tests are checking for an error, either.
I haven't tried: is it possible to get a false error indication while
you are supposed to wait until the RXV11 has digested parameters like
sector / track number? From reading the docs, I would assume that the
only reason for the error bit to come on at this time might be an
invalid parameter like sector > 26, and in this case, you'll probably
better abort as well (sure, should not happen during boot...). So why
not just use this check every time you wait for the controller, once the
check is in the subroutine anyway?
But, you're right: savings aren't too extreme with this approach, as the
sequence BIT-BEQ-BMI takes three words, and a JSR would need two. In
turn, you need two additional words for a MOV #something,SP plus one for
the RTS, and there are four places with a BMI, so in total we save four
words by spending three: makes a total of one word saved. Didn't you say
something like this before? ;-)
However, once you free R0, you can use it to store the track number
instead of SWABing R4. Again: two SWAB words saved, one paid at
initialization time (MOV R4,R0). Then, you will omit the MOV #100240,R0
(minus two words) at the expense of adding one word to the BIT
instruction in the WAITRX routine...
Let me continue, and we can open a contest for writing the shortest
bootstrap! ;-)
Regards,
Andreas
--
Andreas Freiherr
Vishay Semiconductor GmbH, Heilbronn, Germany
http://www.vishay.com
28 Feb
28 Feb
1:25 a.m.
Andreas Freiherr wrote:
Let me continue, and we can open a contest for writing
the shortest
bootstrap! ;-)
Hardware ... Reset button :)
--
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html
3:11 a.m.
Ben Franchuk wrote:
Andreas Freiherr wrote:
... and then what...??? :-)
--
Andreas Freiherr
Vishay Semiconductor GmbH, Heilbronn, Germany
http://www.vishay.com
Let me continue, and we can open a contest for
writing the shortest
bootstrap! ;-)
Hardware ... Reset button :)
4:13 a.m.
Andreas Freiherr wrote:
Ben Franchuk wrote:
Picky ...
Well reset clear's the track,sector,head and DMA address registers.
Clears the cpu's PC and sets the halt F/F and clears IRQ F/F.
Then you jam 'read sector' into the disk controler. The DISK_DONE Irq
clears
the halt F/F.
--
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html
Andreas Freiherr wrote:
... and then what...??? :-) Let me continue, and we can open a contest for
writing the shortest
bootstrap! ;-)
Hardware ... Reset button :)
5:24 a.m.
Ben,
let me continue to be picky, as I often learn new things by trying to
really and thoroughly understand how something works. ;-)
... and then what...??? :-)
Picky ...
Well reset clear's the track,sector,head and DMA address registers.
Clears the cpu's PC and sets the halt F/F and clears IRQ F/F.
Then you jam 'read sector' into the disk controler. The DISK_DONE Irq
clears
the halt F/F.
Will work for some, but not all, media. RL01/RL02, for example, can be
done this way. I have seen a four-word bootstrap that indeed only
consists of putting the required command into the CSR and then WAITing.
Operating instructions: "let the program run for a few seconds, then
HALT and restart at address zero."
Will the IRQ really clear the halt F/F, causing the processor to resume
running? - I need to get my machines running soon, memory is fading...
Other disk types, such as the RXs, require loading of more than one
sector, and not many controllers are like the RK11 in that they
automatically increment sector counters.
What I wanted to point out is that you need to have some kind of
"handler" for the reset button if you want your PDP-11 to have a life
after that. I might call this "handler" a "bootstrap" :-) - And I
intended to have a PDP-11 processor execute the instructions, not a
human! ;-)
--
Andreas Freiherr
Vishay Semiconductor GmbH, Heilbronn, Germany
http://www.vishay.com
Let me
continue, and we can open a contest for writing the shortest
bootstrap! ;-)
Hardware ... Reset button :)
8:10 a.m.
Andreas Freiherr wrote:
Ben,
let me continue to be picky, as I often learn new things by trying to
really and thoroughly understand how something works. ;-)
This example was made as a general example not a real machine.
Will work for some, but not all, media. RL01/RL02, for
example, can be
done this way. I have seen a four-word bootstrap that indeed only
consists of putting the required command into the CSR and then WAITing.
Operating instructions: "let the program run for a few seconds, then
HALT and restart at address zero."
The front panel is your friend.:)
Will the IRQ really clear the halt F/F, causing the processor to resume
running? - I need to get my machines running soon, memory is fading...
While this was not a real example, often a bootstrap I suspect could use
of
tricks with the hardware after reset.
Other disk types, such as the RXs, require loading of
more than one
sector, and not many controllers are like the RK11 in that they
automatically increment sector counters.
But did not the big disc controllers have front panel as well?
I always used paper tape on a PDP-8 with a front panel.
What I wanted to point out is that you need to have
some kind of
"handler" for the reset button if you want your PDP-11 to have a life
after that. I might call this "handler" a "bootstrap" :-) - And I
intended to have a PDP-11 processor execute the instructions, not a
human! ;-)
One other factor with device drivers like on the PDP-8 they had to be
small and support swapping all of core to and from disk.
--
Andreas Freiherr
Vishay Semiconductor GmbH, Heilbronn, Germany
http://www.vishay.com
--
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html
8285
days inactive
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6 comments
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participants (3)
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Andreas.Freiherr＠Vishay.com -
bfranchuk＠jetnet.ab.ca -
pete＠dunnington.u-net.com