Just sitting here wondering why you're not using one of the enhanced-
functioning Z80 chips. Even going with the 64180 or Z180 would give
you 2 UARTS and an MMU, in addtion to 2 DMA channels and a timer.
Later version of this product line, will of course, give you more
instructions and functionality.
But the MMU can make the whole process of bootup very easy. Simply
use the MMU to map the ROM out after the system's been started
(you've got a 1MB physical address space). Duck soup.
But if you want to stick with the "real" Z80, I've seen two methods
of getting around the reset to 0000.
The first is to simply force three bytes onto the system bus to
perform a jump to whatever address you desire after a reset. You'll
only do this once per reset, so the circuitry's pretty simple.
Another way to is to start out with an EPROM mapped in and then
disable it using an I/O instruction. You can leave RAM mapped in for
write cycles, so that only reads will come from the ROM and writes
will go directly to RAM. That way, you can set up locations starting
at 0000 from a ROM.
In any case, the ROM needn't be very big. I think Don Tarbell used a
little bipolar 82S123 PROM. Gives you 32 bytes to do what you need,
which, in Don's case was enough to get the first sector of an 8"
CP/M BIOSes for 2.2 and below are easy--they're poll-mode with
clearly described inputs and outputs. About the only thing you may
find confusing is the IOBYTE convention, but that's optional and
fairly well documented.
I've written a CP/M BIOS without resorting to assembly, doing the
whole thing in machine code. It's not a big thing and you can start
with the basic set of disk and console I/O routines. There are two
boot entry points in the BIOS jump vector--the "cold start" entered
by a jump to 0000 that (re)loads the entire CP/M BDOS and CCP, and
the "warm start" that simply reloads the CCP.
Disk I/O is done in 128 byte "sectors", so if your physical sectors
are longer than that, you'll need to set up blocking and deblocking
All of this is covered in the CP/M System Alteration guide in pretty
fair detail, along with a couple of samples.
CP/M 3.0 or MP/M is more involved, taking advantage of bankswitching.
Interrupt-driven I/O is required for MP/M--and the I/O system is
Sorry it took me so long to reply.
There is no good reason as to why my computer is designed the way it is. I
just sat down one day and decided to build a Z80 computer.
I got a book at the library and did a few Google searches and the next thing
you know I was soldering some parts into a prototype board on my bench. It
went through several interations until I ended up with this design.
The Z80 is definitely the classic although Zilog makes some much improved
integrated components. Using them would have made life much easier I
suppose but I wasn't aware of them when I started.
I definitely wanted to avoid the hard to build technologies like SMT or hard
to get parts or unique programmable parts like PALs, GALs, CPLDs, or FPGAs.
Why? Just because. I could have used those components but in my estimation
they take something away from the "feel" or nostalgia or some other
intangible quality. I am sure Tony probably knows what I am talking about.
;-) I am not sure I do...
One goal was to make the design easy and cheap so that others could make the
project too and keep it affordable. That pretty much eliminated all the
really modern stuff.
I did consider PLCC packaging for a bit since it uses 0.1" spaced pins but
decided to stick with plain old DIP chips since they are easier to work with
and test. Yes, PCB density suffers terribly but there is absolutely nothing
practical about this project in the least :-) Why start now?
Anyway, I am nearing completion of the PCB build process. Last night I got
the machine to boot CP/M from the EPROM. Now it can recognise the ROM and
RAM drives as block devices.
Allison was a huge help in many of the SBC design aspects and I owe her a
debt of gratitude.
Thanks and have a nice day!
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