Building a better "old" computer - test-drb@ccmp.vtda.org

25 Jun 2000

...
 Actually last time I checked, you could only *order*
that machine, not
buy one, as they didn't/don't exist yet (still debugging the prototype).
And it's not an IMSAI 8080 by a long shot, it's a completely different
machine stuck in a familiar-looking box.  So it doesn't address the
original poster's point of building a better-than-1979 machine using
1979 components. 

Amen!

...
 - Backplane busses could have been done a lot more
carefully, e.g.
  differential signal pairs, or at the very least O.C. with terminators
  at both ends (worked well for the Unibus). 

Actually the S100 was cleaned up a bit and would run nicely at 8mb/s
for split or 16mb/s for unified word mode.

But multibus and STDbus were already better standards.

...
 - Doing fancy timing (e.g. RAS-CAS) using RC delays,
one-shots, analog delay
...
   lines, lots of gates in series etc. was a Bad Idea. 
Using a few flip-flops
...
   clocked by a fast xtal clock might require an extra
chip or two, but once
...
   you get it working it will keep on working. 

The better boards did that, alone with 4layer etch. Dram and two layers
was at best problematic.

...
 - SCSI-1/SCSI-2, IDE, and probably other supposedly
"modern" interfaces
  could have been done with 1979 parts.  At the time, the expense of giving
...
   each peripheral its own CPU (or microcontroller at
least) would have been
...
   prohibitive, but if money were no object it would
have been nice to have
...
   some more open standards catch on, since the market
was pretty fragmented
...
   for no good reason.  Floppies were absolute hell in
this regard too. 

Typical system with a HD in the 79-81 timeframe liekly had two CPUs
one for the HD alone!  Teletek, Konan for example.  There wer floppy
cards with local cpu too to further unburden the main cpu.

...
 - Things might have been more stable if microcomputers
had separated the
  ideas of "CPU bus" and "peripheral bus" earlier on.  For the longest
time,
...
   the peripheral bus was always just a buffered version
of the CPU bus, 

depends on the bus std.  Multibus and STDbus for example.

...
   which led to lots of timing problems and
incompatibilities when you
  changed to a different or faster CPU.  But having something that's easy
...
   to interface and has simple timing, like what the ISA
bus became (after
...
   having the same problem for a while), would have been
a good thing, as 

ISA was multibus with broken interrupts and no bus ack handshake, same
timing and interface otherwise.  More interesting formfactor though.

Allison