On Mon, Nov 9, 2015 at 7:04 AM, Brad Parker <brad at heeltoe.com> wrote:
I was wondering about software. Is anyone planning to
turn those schematics
into verilog?
I'm working on dumping the microcode.
The CP2161 control chip and CP2171-nn microms are probably the same as
the corresponding CP1621/CP1661 and CP1631-nn, respectively, other
than the PLA contents in the control chip and the ROM contents of the
microms.
The "control" chip PLAs are involved in macroinstruction decode and
microinstruction sequencing, and there is no known way to dump them
electrically, so as Al mentioned, a friend had photomicrographs of
that chip made. We may need photomicrographs of the CP2161 (LSI-11)
and/or CP1661 (WD-16, Alpha Micro AM100) for comparison. A
low-resolution photomicrograph of the CP2161 is already online, but
higher resolution is needed to resolve PLA contents.
There is evidence that the data path chip, CP2151, is interchangeable
with the CP1611 data path chip used in the LSI-11 and WD16.
The microarchitecture, including the microinstruction set, is
documented in the DEC LSI-11 WCS User's Guide, EK-KUV11-TM-001,
(available on Bitsavers). Note that some details in that manual,
including the usage of microinstruction bus bits MIB<21:18>, are
specific to how the chip set is used in the LSI-11, and are not
applicable to the WD90 chipset.
The WD9000 board contains one WD chip for which no documentation is
available, the WD2083U-04. When I traced the signals it appeared to be
a custom interrupt and DMA request prioritizer. That appears to be
confirmed by the recently found WD9000 schematics (also on Bitsavers).
I suspect that the WD2083 is a mask-programmed PLA.
Other than the WD90 chipset and the WD2083, all of the chips on the
WD900 board were readily commercially available and reasonably well
documented.