3 Sep
2005
3 Sep
'05
3:47 p.m.
Date: Sat, 3 Sep 2005 00:17:50 +0100 (BST)
From: ard at p850ug1.demon.co.uk (Tony Duell)
Most, if not all, of the single-bit-wide DRAM chips
(4164, 41256, etc)
had separate DIN and DOUT pins. They were not dual-ported, though, you
only had one address bus for both reading and writing.
Thank you. I have since noted this on X 1 DRAM datasheets. I had
never noticed that before.
You could link these pins together externally, or you
could use them
separately. IIRC on the IBM PC, the DIN and DOUT pins are linked on the
RAMs storing data bits, but wired separately on the RAMs storting the
parity bits.
What is the point in using them separately? Was it for the case
where the destination of a read is different from the source of a
write? I could see where that could happen in parity checking.
For the data bus though, the source and destination would be the
same. For a little while I thought it might be for some odd timing
advantage. But since the write data isn't required on the bus until
just before the CAS anyway, I don't think the timing idea could be
valid. Besides separate IN and Out could only confer a speed
advantage in the cases where a Read followed a Write or vice versa.
If you have the machines that are supposed to use these
64 pin SIMMs, can
you not just check to see if DIN and DOUT are linked on the mainboard
with an ohmmeter?
I don't have a IIfx or the SIMMs yet. I was exploring the
feasibility of the project first. However, I posted a WTB to the
austin.forsale news group and got lucky with a fellow who wants to
give a IIfx away. So next week I should have hardware to explore.
It's nice to avoid shipping when shipping would be greater than the
value of a machine.
Still, I would like to get my hands on the Apple Hardware Developer
Note for the IIfx. It should at least mention whether they were
using separate data_in and data_out for some timing related purpose.
Of course, if an ohmmeter reveals that In and Out are tied together
on the motherboard, then I'll have my answer.
Jeff Walther
5 Sep
5 Sep
1:11 p.m.
Date: Sat, 3 Sep 2005 00:17:50 +0100 (BST)
From: ard at p850ug1.demon.co.uk (Tony Duell)
Most, if not all, of the single-bit-wide DRAM
chips (4164, 41256, etc)
had separate DIN and DOUT pins. They were not dual-ported, though, you
only had one address bus for both reading and writing.
Thank you. I have since noted this on X 1 DRAM datasheets. I had
never noticed that before.
You could link these pins together externally, or
you could use them
separately. IIRC on the IBM PC, the DIN and DOUT pins are linked on the
RAMs storing data bits, but wired separately on the RAMs storting the
parity bits.
What is the point in using them separately? Was it for the case
where the destination of a read is different from the source of a
write? I could see where that could happen in parity checking.
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