Northstar Horizon - test-drb@ccmp.vtda.org

2 Nov 1999

I have never seen a Z-80A system that needed DMA for disk I/O.  The required
loop is simple enough to synchronize using the nWAIT line.  The CCS and SDS
FDC's both did PIO, and since the OS didn't have anything better to do
during disk I/O, the wasted CPU cycles, if there were any, were going to be
wasted anyway.

In any case, there were a few video boards, notably the one from SDS, which
didn't chew up a bunch of memory space.  There were some which only used a
few locations of memory as opposed to a large (2K) refresh buffer in the
already small memory map.  It's just that N* (and VECTOR) were not among
them.

What's better is not so easy to establish anyway, since what's better to one
person may not be at all acceptable to another.  The N* Horizon was a pretty
popular product.  I didn't like it because of the reasons I've already
stated.  I would not, however, pretend that the CCS or SDS stuff I liked to
use was enough "better" that anyone would be making a mistake to use it.
What persuaded me, however, was that the price of the CCS or SDS stuff was
lower overall.  What's more, I liked the MSC9391 HDC, which was too tall to
fit in most boxes the size of the N* Horizon, including, by the way, the
Altair and IMSAI.  Those Integrand boxes with drive power and lodging built
into the box that powered and housed the backplane were pretty decent,
though, and they'd hold the double-high card from MSC.  There was even
enough room for an extra Power-One PSU (+12, +5) for the HDD so it worked
out for my needs.  That was another factor which drove me in a direction
away from the prepackaged systems.

Dick

-----Original Message-----
From: allisonp(a)world.std.com &lt;allisonp(a)world.std.com&gt;
To: Discussion re-collecting of classic computers
&lt;classiccmp(a)u.washington.edu&gt;
Date: Tuesday, November 02, 1999 1:53 PM
Subject: Re: Northstar Horizon

...
 On Tue, 2 Nov 1999, Richard Erlacher wrote:

> That was my point, exactly.  One shouldn't have to hack a new machine in
> order to make it what one wants.  That's doubly true when you can buy what
...
   you want for
less and not have to hack it. 

Well since the bus was not very standard, and the industry evolving...

The key was what was better, and at the time I did my thing better was a
limited choice.  A year maybe two that choice was far greater but some of
the fundimental design issues I was really taking aim at were not being
solved except by a limted few.  IE: spinning in PIO to do disk IO to me
was plain dumb.  CPU cycles were in my eyes being wasted.  I really didn't
care if it was memory mapped or IO mapped realative to that waste of CPU
as a resource.  In 1977 I wanted reliability NS* had it.  In 1979 I wanted
storage space and more speed and I started working on it.  The DMA (of
smart) boards I wanted however were still wanting or way out of line for
quite a while.

Allison