29 Nov
2014
29 Nov
'14
9:22 p.m.
I have been browsing through some of my old Qbus boards and found one
KD11-F (M7264) CPU with 4 k word memory, a couple of KD11-HA (M7270) , a
KDF11-A (M8186) and some assorted memory boards and some SLUs.
All CPUs seemed to work except for the KD11-F board, which was a bit sad
since that was the original LSI-11 board.
I looked at bitsavers for schematics. Indeed there was one, but my board
revision seems to be older. It is not matching layout wise and it has
plenty of patches. Is there a print set for the older revision of the board?
Well, I am not giving up that easy. The clock signal was there so I
attached the logic analyzer over the control chip and was able to find out
the micro address (sampled at falling PH2 clock) and data (sampled at
falling PH1 clock). The strange thing was that it was not starting at
address 1. It starts of at 89 hex, then steps to 8A and then to 39D. The
data returned is FFFF, FFFF and 708A (forever).
FFFF is supposed by NOP. 708A is also some other valid micro instruction.
(according to the EK-KUV11-TM_LSI11_WCS.pdf
<http://www.textfiles.com/bitsavers/pdf/dec/pdp11/1103/EK-KUV11-TM_LSI11_WCS.pdf>
)
Is the micro code source / dump for the LSI-11 available somewhere?
If I remove one of the MICROMs it starts at 1 and goes on 2,3,4,5,6, etc.
My guess is that one of the MICROMs are bad, forcing some bits low. Or
maybe the strange precharging isn't working?
Now, I have several M7270. I could sacrifice one board to get the other
working. But are the chips identical? The markings on the chips are not
identical.
The M7264 board has the following chips:
CP1611B-51 2111549
CP1621B451 23001C201
CP1631B-10 23088A501
CP1631B-07 23087A501
The M7270 board has the following chips:
1611H 21-15579
3007D 23-002B5
3010D 23-001B5
2007C 23-002C4
Is there a engineering drawing printset for the M7270 (KD11-HA) somewhere?
/Mattis
29 Nov
29 Nov
10 p.m.
On 29/11/2014 20:22, Mattis Lind wrote:
I have been browsing through some of my old Qbus
boards and found one
KD11-F (M7264) CPU with 4 k word memory, a couple of KD11-HA (M7270) , a
KDF11-A (M8186) and some assorted memory boards and some SLUs.
All CPUs seemed to work except for the KD11-F board
The M7264 board has the following chips:
CP1611B-51 2111549
CP1621B451 23001C201
CP1631B-10 23088A501
CP1631B-07 23087A501
The M7270 board has the following chips:
1611H 21-15579
3007D 23-002B5
3010D 23-001B5
2007C 23-002C4
As far as I knew, they used the same chipset with the same instruction
set, but those are clearly different. The 21-15579 is the ALU etc, the
23-xxxxxx are the microcode ROMs. Obviously you could swap the
21-15579, but you probably can't mix-and-match the ROMs. It couldn't be
that one set is something other than a PDP-11 instruction set?
--
Pete
30 Nov
30 Nov
12:03 a.m.
l?rdag 29 november 2014 skrev Pete Turnbull <pete at dunnington.plus.com>:
On 29/11/2014 20:22, Mattis Lind wrote:
Further searching and I found the LSI-11 Systems Service Manual from August
81. It describes the various revisons of the M7264 and M7270. Originally
the chip used -5.1 V Vbb. But M7270 and rev E an onwards of the M7264 use a
-3.9 V Vbb, which implicated use of other chips. So, they are not compatble
as it appears unless I modify the Vbb generation circuit on the board.
Does anyone have a spare 23088A5 chip, maybe?
I have been browsing through some of my old Qbus
boards and found one
KD11-F (M7264) CPU with 4 k word memory, a couple of KD11-HA (M7270) , a
KDF11-A (M8186) and some assorted memory boards and some SLUs.
All CPUs seemed to work except for the KD11-F board
The M7264 board has the following chips:
CP1611B-51 2111549
CP1621B451 23001C201
CP1631B-10 23088A501
CP1631B-07 23087A501
The M7270 board has the following chips:
1611H 21-15579
3007D 23-002B5
3010D 23-001B5
2007C 23-002C4
As far as I knew, they used the same chipset with the same instruction
set, but those are clearly different. The 21-15579 is the ALU etc, the
23-xxxxxx are the microcode ROMs. Obviously you could swap the 21-15579,
but you probably can't mix-and-match the ROMs. It couldn't be that one set
is something other than a PDP-11 instruction set?
--
Pete
2:40 a.m.
On 29/11/2014 23:03, Mattis Lind wrote:
Further searching and I found the LSI-11 Systems
Service Manual from
August 81. It describes the various revisons of the M7264 and M7270.
Originally the chip used -5.1 V Vbb. But M7270 and rev E an onwards
of the M7264 use a -3.9 V Vbb, which implicated use of other chips.
So, they are not compatble as it appears unless I modify the Vbb
generation circuit on the board.
Does the Service Manual say anything specific about the ROM
compatibility? I wonder how important it is to match the ROM set to the
Vbb value, and to what extent the change was for improved noise immunity
or longevity.
They're clearly slightly different types of ROMs, though. If you write
the numbers in the standard way they'd be shown in, say, a DEC parts
list, you can tell something about them. For example, 23088A501 would
be 23-088A5-01. 23- means it's a ROM (or at least a ROM-like
programmable part; 21- is a microprocessor or copro); the next three
characters are numeric digits specifying the ROM number; "A5" tells you
about the width and technology (the 'A') and the size in kilobits. So
B5 and A5 are presumably slightly different technologies - but as the
socket layouts are the same, presumably the same width. Incidentally, I
don't know what Bx means but every Ax I've seen is a bipolar PROM.
The -01 is like a version number (sometimes used for different suppliers
of the same device in other types of parts). I've never seen anything
other than -01 for a ((E)P)ROM, though, because DEC seem to have always
changed the 3-digit code for even the most trivial changes to content.
Note there's no relationship between numbers for successive revisions.
For example 23-264E4/23-265E4 and 23-188E5/23-189E5 are both RQDX2 ROM
sets but the lower-numbered one is the later version (V.10.0E; the other
is V8.0).
BUT, as an aside, they did occasionally reuse triplets, requiring you to
read the next two characters as well. For example, 23-089E2 is a
16k-bit TU-58 firmware ROM (E2=2Kx8 MOS) while 23-089E8 is part of a
MicroVAX 3100 boot ROM set (E8=128Kx8 MOS).
--
Pete
3:48 a.m.
For what it's worth these are the versions that I have on my M7264-YB,
which is also non-functional:
E53 21-15579 Data Chip (ceramic)
E58 2007-C Control Chip (ceramic)
E63 23-003B6 ROM Chip 1 (ceramic hybrid dual chip package)
E70 23-004B5 ROM Chip 2 (plastic)
E75 23-005B5 KEV11 (ceramic)
9:29 a.m.
On Sat, Nov 29, 2014 at 7:48 PM, Glen Slick <glen.slick at gmail.com> wrote:
E63 23-003B6 ROM Chip 1 (ceramic hybrid dual chip
package)
That hybrid has both of the base instruction set Microms.
E70 23-004B5 ROM Chip 2 (plastic)
E75 23-005B5 KEV11 (ceramic)
Those two together are a KEV11-CA DIS (a subset of CIS). I've been
trying to obtain those do dump the contents, as they are fairly rare.
Another rare one is the KEV11-B, which apparently provides EIS but *not* FIS.
I've got an untested design for a microcontroller-based Microm
emulator that would fit into a Microm socket, but I haven't built one
because I haven't so far had any special microcode I wanted to run.
Eric
12:32 p.m.
2014-11-30 9:29 GMT+01:00 Eric Smith <spacewar at gmail.com>
Those two together are a KEV11-CA DIS (a subset of CIS). I've been
trying to obtain those do dump the contents, as they are fairly rare.
How did you do the dumping? The unconditional precharge, conditional
discharge structure seems quite elaborate. Or maybe it is just to do have a
OC driver enabled at phase 2?
Do you have dumps of the micro code? Or are there any publicly available
source listing for the micro code?
I've got an untested design for a microcontroller-based Microm
emulator that would fit into a Microm socket, but I
haven't built one
because I haven't so far had any special microcode I wanted to run.
If dumping is easy (?), now how does this precharge thing work in you
emulator?
Eric
1:41 p.m.
On Sun, Nov 30, 2014 at 4:32 AM, Mattis Lind <mattislind at gmail.com> wrote:
How did you do the dumping?
Supplied power and four-phase 12V MOS clock.
Just after start of phase 1, micro drives address on MIB<10..00>, all
others high.
Just after start of phase 2, micro drives all MIB lines high, waits
briefly, then sets all to Hi-Z.
Just after start of phase 4, read MIB lines.
The missing part is how to dump the PLAs in the control chip. Will
probably have to do that optically.
The unconditional precharge, conditional
discharge structure seems quite elaborate. Or maybe it is just to do have a
OC driver enabled at phase 2?
Unconditional precharge is easy, it always happens at the same time(s)
during the cycle, though MIB<16> and MIB<15> are different than the
others. However, the Microm doesn't care; it only requires that they
have the address (and /MIB16 high) at the start of phase 2, and then
all precharged high once it's latched the address, so it can use
conditional discharge to drive the outputs.
It's the control and data chips that put more complicated requirements
on precharge, but since they're not present when dumping a Microm,
those requirements aren't either.
Conditional discharge is as you say, just OC drivers.
Do you have dumps of the micro code?
I had just dumped one Microm, I think successfully but I don't know
with certainty, before I moved 2 1/2 years ago. I haven't found the
bits since, so I may have to do it again. Not a big deal since I want
to dump other Microms anyhow.
If dumping is easy (?), now how does this precharge
thing work in you
emulator?
Same as the KUV11, just use the real Microms for precharge. They'll
do that even if you ground their enable input.
If I really wanted to do precharge in the emulator, I'd add one pFET
with series resistor to each MIB line, and inverters from phase 2 and
phase 4, and a NAND gate from both, to enable the appropriate FETs.
12:24 p.m.
2014-11-30 3:48 GMT+01:00 Glen Slick <glen.slick at gmail.com>:
For what it's worth these are the versions that I
have on my M7264-YB,
which is also non-functional:
E53 21-15579 Data Chip (ceramic)
E58 2007-C Control Chip (ceramic)
E63 23-003B6 ROM Chip 1 (ceramic hybrid dual chip package)
E70 23-004B5 ROM Chip 2 (plastic)
E75 23-005B5 KEV11 (ceramic)
Then you have the newer revision of the board. The sockets for CPU chips on
my board is E41, E47, E52, E56 and E65.
12:22 p.m.
2014-11-30 2:40 GMT+01:00 Pete Turnbull <pete at dunnington.plus.com>:
Does the Service Manual say anything specific about the ROM
compatibility? I wonder how important it is to match the ROM set to the
Vbb value, and to what extent the change was for improved noise immunity or
longevity.
Unfortunately I didn't mention anything about compatibility. Just that a
certain revision also changed what chips were used. It listed the Vbb
voltages for a set off chips. Here is the link to the manual:
https://ia601000.us.archive.org/5/items/bitsavers_decpdp11LSnualAug81_12677…
The older make use of -5.1 V substrate bias whilst newer used -3.9V. I am
not that eager to try to mix the chips between the boards if this would
make them to fail. I cold try to modify the bias circuit. But then it
probably also affects the -5 for the memory chips. It uses MK4096 chips.
My board seems be a etch revision D, and schematic revision H if I read it
correctly. The schematic at bitsavers (
http://www.textfiles.com/bitsavers/pdf/dec/pdp11/1103/1103_Schematics.pdf)
is a revision "Z" and is for the "F" etch revision.
Does anyone have the older schematics for the KD11-F etch revision C or D?
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