On 7/14/10, Henk Gooijen <henk.gooijen at hotmail.com> wrote:
From: "Ethan Dicks" <ethan.dicks at
gmail.com>
I don't recall seeing anything in a DIP
package badged faster than
12.5MHz... (68EC000?)
You're probably right. The 68EC000 is QFP (IIRC) isn't it?
I think so.
The 68000 DIL package is an impressive chip (taking a
lot of PCB space).
It's more impressive covered in logic prove leads. I still have a
Northwest Systems analyer (that taps all the pins via a pod and fat
ribbon cables) which does logic and code tracing (buffering the past
4096 bus accesses and driven by a dedicated IBM 5150 PC). I haven't
fired that up in years, so I have no idea if it would work without
maintenance, but all the gear is stacked in a VAX-11/725 chassis that
was stripped at work (at the time, it was cheaper to buy entire
11/725s than individual replacement 11/730 parts) with the pod cables
coming out the RC25 hole.
Jup. I was indeed thinking of byte-wide SRAM and EPROM
(27512).
To keep things simple (and code efficient / fast) the EPROM will sit
in $FFFF0000-$FFFFFFFF (you need some ROM there for the reset
vector)
ISTR the reset vector is low - there's a fiddly circuit in the Amiga
for that, and we had our own "BOOT BIT" that got hammered to migrate
the ROM from low to high. I think the "modern" technique is to mirror
ROM at $0 and $FFnnnnnn and have a circuit that monitors A23 - as soon
ass A23 goes high, clobber the ROM mirror at $0 and open it up to RAM.
and the RAM sits at $00000000-$0000FFFF. If you know
the
68000, those 2 regions are "zero page" and references are shorter
which means less code bytes and less clock cycles.
Right, plus you can have runtime-resettable TRAP and INT vectors.
I was thinking of simple 6850 ACIA's and 6821
PIA's (or better 6522).
I've interfaced 6821s to 68000s (very simple) and the original Mac has a 6522...
use the peripheral chips in combination with VPA*...
Yep.
EPROM and RAM at 100ns or 70 ns is easy to get. As
everything goes
on one single Euro card, there is no need for address or data buffers.
Indeed, though I think even our single-board COMBOARD had address
buffers - dunno if that'd still be necessary with 6-8 modern chips on
the bus. We had two EPROMs, a DRAM chip, some internal logic for
Unibus or Qbus DMA, and 2-3 I/O peripherals (Z8530, MC6821, etc). I'd
prepare for the possibility that you'd need to have a couple of '245s
there, but for a prototype, you could jumper across the '245 pins and
see how the address lines hold up.
Something that
might be an interesting alternative to a VT220 might be
an HD44780-type textual LCD...
Nice!!
I will give this some thought ... you could connect the LCD via a parallel
interface directly to the 68000 board and let the 68000 do the addressing.
Yes. Trivially (2-3 address bits and 8 data bits and perhaps 2 gates
more than the upper address select logic.
Later, for performance reasons, you could offload some
tasks for the
LCD to an AVR.
Could do that.
2x40 would be enough for the 2 rows of lights on the
8/e front panel.
I can see that.
4x40 would leave room for a (debug) output text line,
and you could
implement on the bottom row a "soft key" text line. Just beneath the
LCD are a few rectangular push buttons. Its meaning depends on the
state and is indicated on that 4th line of the display.
Interesting idea - I think that would be cool.
2x40 displays are much cheaper than 4x40 displays, though. I've
picked them up attached to Satellite TV receiver front panels (with
LEDs and pushbuttons and software-controllable contrast) from
companies like BG Micro for as little as $8. For a bit more, you can
get 2x40 VFDs that you could see across the room. The only thing that
isn't immediately apparent to me is the switch-to-switch dimension to
line up switches with the display bits (if you wanted to do that sort
of thing - even simulated lights with just a "boot" switch would be
interesting to watch as the machine ran through its paces).
Cheers,
-ethan