That's why it's been common practice to fire anyone who uses one-shots (monostables) for anything. I personally believe it should go beyond that, in that the perpetartor of such a heinous crim should be barred from asserting his credentials as a circuit designer for a short period, of, say, 10 decades. There is, I'm sure, a place for one-shots, but they've been abused so often it's hard to remember what that might have been. Dick ----- Original Message ----- From: "Tony Duell" &lt;ard(a)p850ug1.demon.co.uk&gt; To: &lt;classiccmp(a)classiccmp.org&gt; Sent: Wednesday, October 24, 2001 4:21 PM Subject: Re: What people "should" know <snip>

The practice of generating a sequence of pulses with one-shots is the principal sin against which those in power began to rail in the '80's, demanding that all events be driven from a single primary oscillator. I'm quite comfortable that one might want to use an analog delay for a single, isolated, and both infrequently and irregularly occurring event. I personally prefer to use a self-inhibiting counter chain that's cleared by the "trigger" event to do that sort of thing, but I don't do it often. In the same time period that one-shots became anathema to respectable circuit design, it became a common mandate that all circuitry in a subsystem had to be synchronous. In some cases that meant the one-shot was replaced by a self-inhibiting counter gated with a two-input gate that was buffered with four flipflops (dual rank registered inputs to each input of the gate) and its output synchronized with another flipflop clocked by the global clock, and the output of the counter clocked out via yet another likewise globally clocked flipflop. At the time it was a lot of expensive (because it had to be fast) logic, just to ensure the precise synchronization of a pulse that really didn't matter if it varied over 20% of its period and jittered by 10-20 clocks either way. Nowadays nobody gives it a second thought, since a hundred registers more or less in an FPGA cost essentially nothing and they're all nearly infinitely fast. We're heading for a time when registers are packaged by the billion and the only real issue in synchronous logic design is the clock skew. Things change ... Dick ----- Original Message ----- From: "Tony Duell" &lt;ard(a)p850ug1.demon.co.uk&gt; To: &lt;classiccmp(a)classiccmp.org&gt; Sent: Wednesday, October 24, 2001 7:09 PM Subject: Re: What people "should" know in his

On Thu, 25 Oct 2001, Tony Duell wrote: A better analogy for the software people is to assume a variable is initialized when the program starts. I spent weeks tracking down a bug which only showed up the second time a program was run. The debris in memory from the compiler made it happy the first run, but the leftovers from the first run made the second crash... One-shots generate a pulse whos timing is based on discrete components, general a resistor and capacitor, though the resistor may be internal to the component. With standard components, the resistor is +/- 5% and the capacitor is +/- 20%. They also change value with age and use, so one-shots usually are paired with a variable resistor to keep them tweaked in. When you are running a board at a few kilohertz, the component tolerance doesn't hurt you too bad, at a megahertz it's painful, and at tens of megahertz it just doesn't work. In the good old days, dedicating 10 flip-flops to generate a pulse was an expensive answer, now days, (as someone else pointed out) flip-flops are basically free, but an analog one-shot (with capacitor) is really huge! clint