>>>> 13 Divide
>>> HMMM, the command takes very long but the results are
>>> very strange. I thought it might be some type of
>>> random number generation by an irreducible polynomal,
>>> but it is definitively not Divide. Maybe here is something
>>> different or wrong with the microcode.
>> This divides a signed DOUBLE LENGTH number in the A and Q registers
>> by a signed memory operand. IIRC the A register gets the result and
>> the Q register the remainder.
> OK, I will verify this in the coming days. Now I
> know what to look form but according to my records
> the results of this command always have been junk.
Did the experiment on the real unit:
Memory operand had always value 0x003, executed
several of the (with index register zero at
the start) broken-divide:
Akku before: 001 005 010 020 050 100 120 150 200 500 fff
Q before: fff 500 200 150 120 100 050 020 010 005 002
Akku after: 2ab d55 ff5 fe5 fb5 f05 ee5 eb5 e05 b05 d57
Q after: 000 000 001 001 002 002 003 003 004 004 005
Hmm, difficult to spot a pattern, but then with these large 24 bit
values you will be getting overflow when dividing by such a small
number and try to fit the result into a 12 bit register. I would try
with a much larger number as the memory operand, say 0x100. Another
thing you can try is using the 12 order to do a multiply and then
using the 13 order to do a divide by the same memory operand and see
if you get anything like the numbers you started with.
So honestly speaking I cannot see the system behind
these numbers ;-) In repeating the experiment I get
the same numbers. Changing the memory operand to
0x234 I get the following:
Akku after: 003 013 03b 075 123 3a1 415 4c5 743 f2f ffd
Q after: 000 000 001 001 002 002 003 003 004 004 005
So... ...big questionmark ...
Ah that's better. Except I still can't see any pattern except that
the Q register is counting up every other time. I wonder if it is
doing one step in the division each time and you are supposed to loop
and stop when Q reaches a certain value. This would improve maximum
interrupt latency. But you say this order takes a long time. Maybe it
is just broken as you thought. I'll see what I can come up with.
"MTA
- Move To Accu" is one of two "two-read-cycles"
instructions. Up to now I did not fugire out, what
the other instruction does with the data read. Do
you remember any "two-read" instructions in the Elliotts?
Only the
instruction I invented. The first word had the address of a
Hey, you where active
in the design of these beasts!
Really great! So I am proud, that you join this
discussion so actively!
a call without lots of special literals. We
reused /3 I think, anyway
the original instruction was corrupt the Q Register with B-Line
indexing, but B-Line indexing corrupted the Q register at the start
of the instruction, so a totally useless opcode.
Interesting story! In my opinion
and in modern
times using VHDL to implement everything into hardware
very easy, the true heroes are the people like you
who implemented microcode with the solder iron or
the hand wired type of core-ROM! Really great!
Actually I was employed a junior programmer and eventually became
responsible for the Coral 66 compiler and utility software for the
920. Later on I became a 'Senior Systems Engineer' and made some
suggestions to the engineers here and there. I really learned about
hardware as a hobby with my ICT1301 mainframe. After I left I
designed interface cards for micros and my most complex hardware
design was a NuBus card for the Macintosh which could transfer up to
64k of data to wide format Versatec Plotters at a million BYTES a
second without any intervention from the CPU (i.e. by Direct Memory
Access). While that was going on the CPU was imaging the next chunk
of data to be sent. It had to be real time because if the plotter ran
out of data it would stop and the liquid toner would soak into the
paper and spoil the image.
I suspect the big plug is for the OMP (Operator's
Monitor
Panel), and
Some kind of blinking-light console? Something like
this exists for the Rolm 1666b, too. This would be
cool to have! ;-)
Yes, but these were of course much rarer than the computers
themselves.
Sniff...
For a level 1 interrupt when the processor is on
level 2, it stores
the SCR in location 2, and the B in location 3. Then it loads the SCR
from location zero and the B from location 1.
That is a clever concept and should
be easy to detect.
So I will have to do some hardware work in supplying the
signals to the appropriate lines and than I will be
able to test this hypothesis.
Good.
BTW: Have
there been timers on the Elliotts you
know about?
Yes bit not within the CPU box.
Ah OK, so there is some kind of
external data bus on the
Elliotts. In the case of PEC it consists of a multiplexed
open collector bus with a strobe line: address is
applied, than the strobe line is set low by the CPU.
Shortly afterwards address is removed by the CPU again
and the memory unit applies the data to the bus if
read is compite and signalizes this to the CPU. This
bus runs quite stable even with the 75cm of ribbon
cable of my setup attached to it. The shortest instructions
which read only onw word are executed within 1.2us
independent of the value of the index register.
Yes the CPU and some memory was in one box and extra memory in
others, and lots of peripherals too. Not commercial things of course,
things like compasses, gyros, special digital radio receivers and
transmitters, custom keyboards and vector and raster monitors, chart
recorders and much more.
No, when I started working for Elliotts, all
computers were out of my
reach, but then I was offered an old mainframe (which originally cost
247,000 pounds, for scrap value, 150 pounds). It was built in 1962. I
now have two of them in a barn at home. LOTS of lights and switches,
each has a card reader, card punch, line printer and one has a paper
tape reader and punch. Oh they both have drum stores and ten track
magnetic tape.
Wow - that is a really great setup!!!! Do you
have got any photos???? How much space offered
the drum memory?? Recently I saw a card reader
in action at the
cray-cyber.org and I know that
this is really great stuff!!
A chap who used to be a service engineer on my computer many years
ago contacted a while back and kindly agreed to help me bring my
computer back into a useable state. He has a web site describing the
project, and there are some pictures of him and my machine at http://
ict1301.co.uk/13010510.htm . The rotary switches can be used to put
data into registers, including the three instruction registers, so
you can enter programs from the keys if all else fails. The green
squares have four indicators in each one, so can display one decimal
digit (it is primarily a decimal machine, 12 digits * 4 bits)
The machine can be run at full speed, or at three instructions per
second, or at one instruction per keypress, or at three clock cycles
per second or at one clock cycle per keypress.
There are 6 tape decks see
http://web.onetel.com/~rodritab/mtani.htm
The bigger picture of a complete machine is here: http://
ict1301.co.uk/13012006.htm
though it is actually a model and has the earlier one inch tape decks.
An actual machine is the lower picture at : http://
www.milsom100.freeserve.co.uk/1301/1301f.htm
Oh for all that space! I have two machines in less space they use for
one. Mind you one of mine is not assembled. It makes taking pictures
very difficult.
Roger.