Dave McGuire wrote:
On Jun 19, 2007, at 1:30 PM, Ethan Dicks wrote:
Providing
the word length is a multiable of 4 bits that is.
It sure would be "fun" to debug microcode issues with nine of those
puppies chained together.
Have logic analyzer, will travel..
heh. have pc based simulator, will debug...
:-)
writing code to emulate the lisp machine microcode was not that hard,
but getting it *exactly* right turned out to be difficult, mostly due to
not understanding some of the math pipeline issues. That uses 48 bit
wide microcode and 78181's as alu slices.
if one were planning to make a ks20 out of an fpga, with microcode, I'd
recommend writing a simulator for the microcode first and booting
something in simulation.
then, when you go to do the hdl you'll having something known to work,
at least in one context.
i've run the lisp machine verilog in modelsim up through the first disk
i/o. I would think a pdp-10 would not that much more complex.
(oh boy, i'll live to eat those words :-)
-brad