<This would require a variable length or variable preset counter sourcing

<clock. The problem was knowing when it was going the generate an M1 cycle I used a shift register and an or gate.

<counts. Either that or you'd have to look for the clock edge after the <appearance of the M1 strobe and KNOW it wasn't part of the interrupt <acknowledge. Neither was thrifty with logic, nor was it fun. M1 made it easy. the logic was if M1 then hod clock one cycle.

<I had one friend whose NorthStar convinced me every time I saw it, that I <didn't want one. We were using CP/M, and you really didn't have even one <byte to spare in your measly 64K. His NorthStar only had 48K of memory <space, for some reason. Maybe it was because they'd mapped that region fo Funny mine has 56k to the base of BDOS. The trick is CCP and BDOS resides below the controller at E800h and the BIOS in the 4K at F000h. I also have a PROM burnt for F800 (trivial). The first banking scheme I did had mappable 4k pages in the F000h space. Very nice really. Later I went softsector using a uPD765 (I worked for NEC sooo...) and pulled the hard sector controller.

Allison