Somehow I missed Robert Krten's original post, but I saw two lines quoted, and since minimum-information puzzles are fun I'll quote it for reply. Forgive me if I'm missing obvious clues that were presented in the original. :) In _both_ core stacks? Well, there goes the obvious inhibit-driver answer... If it were me, I'd be tempted to stick a probe onto the output of the MB00 flip-flop (M220, E/F 34, pin U2 of the E side) and see if it were spitting out usable information or nonsense. If it's nonsense, you've probably found your culprit. If it's being sensible, I'd follow the signal to the inhibit drivers (and perhaps to the front panel as well) to verify it's going where it needs to go. (Does that signal go to the inhibit drivers directly? It may go to the memory extension control and get rebuffered there first, but alas I don't have my extended-memory-control drawings handy... If the MB00 signal _does_ get rebuffered between the original F/F and the inhibit drivers, that rebuffering device would be an even more likely place to look for a problem.) Let me know if this helps. I'm curious now. [I suppose it's possible that the bit 0 inhibit drivers of _both_ stacks could independently be locking themselves on, but it seems unlikely. :) ] [I suppose your MB00 panel light could have burned itself out at an inconvenient moment as well, but that seems entirely too simplistic an answer. :) :) ] -O.-

I finally got the original post, along with the followup. :) It suddenly dawned on me that I've got the memory-extension schematics on my hard drive (thank you, Mr. Kossow!), and can actually look at them without digging through the storage room... In the Memory Extension Control the MB is indeed buffered, and becomes the MCBMB (presumably "Memory-Control-Buffered Memory Buffer"). Curiously, it rebuffers the MB by taking the signal from the _other_ side of the original MB00 flip-flop - e.g., MB00(1) - and inverting it prior to use. I'm guessing this is to minimize rewiring of the backplane when installing the extended-memory option. The inversion for MB00 takes place on the M617 at B12. Does the problem move down to MB06 if you swap the M617s at B12 and B13? Similarly, is the MB00(1) signal making it from E34 pin T2 to B12 pin A1? I don't know if that'll make a difference, but I'm hoping. :) The rebuffering looks like it's primarily for extensions located off the main board, but it may affect the first two 4K stacks as well.. I'm not sure what wiring changes, if any, are done on the 8/I backplane to accomodate the memory-extension control, or whether the MB/MCBMB signals are a part of that. Anyone know of a reference for this? Anyway, that's my thought. I hope it helps, because if that isn't it the guesses start getting esoteric. :) :) -O.-

Following up on my on post, and top-posting at that :-) IT WORKS NOW!!! Apparently, I hadn't actually swapped two of the cards that I thought I had. It was the G021 swap at A31/A32 that didn't appear to have happened. Swapping it again (anyway) moved the problem to another bit. I had to pull a G021 out of my PDP-12 to fix the 8/I :-( Now I can run a small program!!! 0000 2010 ISZ 0010 0001 5000 JMP 0000 0002 7001 INC 0003 5000 JMP 0000 This flashes (almost) all the lights in the accumulator in a nice, slow, count up. I say almost, because apparently an M220 is still broken and doesn't carry. I've found it, now just to fix the chip. OH HAPPY DAY! :-) Cheers, -RK Robert Krten sez... -- Robert Krten, PARSE Software Devices +1 613 599 8316. Realtime Systems Architecture, Consulting and Training at www.parse.com Looking for Digital Equipment Corp. PDP-1 through PDP-15 minicomputers!

Damn! Pick an easy problem next time. :) -Is there continuity between the sense-amp MEM00 outputs (A31, pin A1; A17, pin A1) and the MEM00 input to the major register gating (F34, pin R1)? Seems obvious, but I'll ask. -If you physically remove one of the 4K core stacks, including the sense amps and inhibit drivers, does the problem go away? If so, then it's possible one of its sense-amps has gone berserk and is forcing the signal low for everybody. Seems hysterically unlikely, but I'll suggest it. Similarly I suppose a defective inhibit driver might _some_how do the same thing to the original input, though it seems less likely. -If you took the MEM00 line coming from the sense amps and tied it high, say perhaps at its entry to the major register gating (F34, pin R1), and then tried a few EXAMs, does the MB00 finally get pulled high? It better. :) If it doesn't then something must be happening with the major registers and/or gating, M220 swaps notwithstanding. Maybe a bad contact at the backplane?... -If you take the MB00 line, disconnected it from the M220 (E34, pin U2) and tied it high, then took MB00(1) off E34 pin T2 and tied it to ground, it should force the writing of a 1 at that bit no matter what the hell may be happening elsewhere. Does it? If not, what happens if you reattach those and then force MCBMB00 high instead (B12, pin E1)? Hopefully one of these might provoke a reaction, and thus narrow down the problem to something prior to the inhibit drivers themselves. If so, great; if not, a similar process might be tried from the sense-amp outputs forward (though there's not nearly as much to test in that direction). ...I hope one of these ideas makes an answer appear. You know, the twisted thing about this process is that I'm actually enjoying it. But I suspect most of you will understand that. :) -O.-