OmniUSB and pdp8/a - anybody experience? - test-drb@ccmp.vtda.org

22 Mar 2014

Hi folks,

I have or don't have a problem with one of the OmniUSB board. I just don't know. 
So is there anybody who has tried to use a board in a pdp8/a? Or is there 
someone with a board and a pdp8/a at hands to give it a try?

This is the story: I distributed most of the OmniUSB boards last year. And did 
not get very much feedback from the people who bought them. I know only of one 
party having successfully used the board. All boards have been checked with a 
special CPLD firmware and a checkout program on the pdp8 which together provide 
complete test coverage for all signal ways going to the pdp8 and back. Even the 
DIP switches were tested individually. So I strongly assume that all boards I 
shipped are working fine. But.... A few weeks ago I got informed of a board just 
not doing anything in a pdp8/a. I gave hints how to use it etc. Then I asked to 
send the board back to me to check what is wrong with it. The board arrived and 
I put it into my development 8/e - works perfectly. I also did my checkout 
routines - everything seems to be perfectly fine. Now I have no idea what could 
be wrong. Something with the 8/a? Or a general 8/a issue? The 8/a has the same 
CPU as the 8/e afaik. Could there be some subtle differences between 8/a and /e?

Following some detailed info about how OmniUSB talks to the Omnibus:

These are the signals from and to the Omnibus:
...
      -- Omnibus connections
     io_pause      : in  std_logic;
     ts3           : in  std_logic;
     tp3_n         : in  std_logic;
     sw_n          : in  std_logic;
     initialize_n  : in  std_logic;
     md            : in  std_logic_vector (3 to 11);
     DATA_R        : in  std_logic_vector(4 to 11);
     DATA_D        : out std_logic_vector(4 to 11);
     internal_io_d : out std_logic;
     c0_d          : out std_logic;
     c1_d          : out std_logic;
     skip_d        : out std_logic;
     int_rqst_d    : out std_logic; 
The most operations are enabled by a signal named io_active which is:

...
    io_active <= io_pause and ts3; 
e.g.
...
      if (match_rx = '1' or match_tx =
'1') and io_active = '1' then
       internal_io_d <= '1';
     end if; for driving the internal_io Omnibus line

Might this be a problem? Is there anything different with 8/a bus timing? Is the 
TS3 signal unavailable? Is the io_pause signal unavailable?

I appreciate any hint.

Kind regards

Philipp