OT, but info needed: RAM uprade - test-drb@ccmp.vtda.org

29 Dec 1998

On Tue, 29 Dec 1998 ard(a)p850ug1.demon.co.uk wrote:
...
  The PC? Well it has active high edge triggered
signals. I believe 
 (although I would have to check all the details) this saves one TTL chip 
 on the PC motherboard. A chip costing <$0.50 in _1 off_. And we've had 
 the IRQ sharing problem ever since.... 
If I understood, this could be summed up as:
When an interrupt happens, the interrupt line is pulled low by the
interrupting device. If it's edge triggered, the CPU can't tell how many
devices are causing the interrupt and only services the first one.

And are you saying that if they were level-triggered, I could have two
devices on IRQ 7? And is it easy to design a level-triggered equivalent
to the PC on paper? Are all PS/2 s level-triggered or only the MCA ones?

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Max Eskin | kurtkilgor(a)bigfoot.com | AOL: kurtkilgor