I built a disassembler years ago to pick apart
captured malware. By
now it handles about a dozen ISAs. While 8080 and 8085 are not on the
list, Z-80 is; adding 8080 would be a relatively simple thing. I've
added that to my to-do list; if someone can point me to 8080/8085
machine language documentation that would save me some searching (which
is something I'm not much good at in these days when frickin'
*everything* is shoehorned into a Web page).
You mean something like this, from another disassembler project:
/* ---- Intel opcode table ---- */
static dispblock inteldisp[256] = {
{ 0x00, 1, inst, 0, "nop" },
{ 0x01, 3, inst, 0, "lxi b,%2" },
{ 0x02, 1, inst, 0, "stax b" },
{ 0x03, 1, inst, 0, "inx b" },
{ 0x04, 1, inst, 0, "inr b" },
{ 0x05, 1, inst, 0, "dcr b" },
{ 0x06, 2, inst, 0, "mvi b,%1" },
{ 0x07, 1, inst, 0, "rlc" },
{ 0x08, 1, unused, 0, 0 },
{ 0x09, 1, inst, 0, "dad b" },
{ 0x0A, 1, inst, 0, "ldax b" },
{ 0x0B, 1, inst, 0, "dcx b" },
{ 0x0C, 1, inst, 0, "inr c" },
{ 0x0D, 1, inst, 0, "dcr c" },
{ 0x0E, 2, inst, 0, "mvi c,%1" },
{ 0x0F, 1, inst, 0, "rrc" },
{ 0x10, 2, unused, 0, 0 },
{ 0x11, 3, inst, 0, "lxi d,%2" },
{ 0x12, 1, inst, 0, "stax d" },
{ 0x13, 1, inst, 0, "inx d" },
{ 0x14, 1, inst, 0, "inr d" },
{ 0x15, 1, inst, 0, "dcr d" },
{ 0x16, 2, inst, 0, "mvi d,%1" },
{ 0x17, 1, inst, 0, "ral" },
{ 0x18, 2, unused, 0, 0 },
{ 0x19, 1, inst, 0, "dad d" },
{ 0x1A, 1, inst, 0, "ldax d" },
{ 0x1B, 1, inst, 0, "dcx d" },
{ 0x1C, 1, inst, 0, "inr e" },
{ 0x1D, 1, inst, 0, "dcr e" },
{ 0x1E, 2, inst, 0, "mvi e,%1" },
{ 0x1F, 1, inst, 0, "rar" },
{ 0x20, 1, inst, I85, "rim" },
{ 0x21, 3, inst, 0, "lxi h,%2" },
{ 0x22, 3, instw, 0, "shld %a" },
{ 0x23, 1, inst, 0, "inx h" },
{ 0x24, 1, inst, 0, "inr h" },
{ 0x25, 1, inst, 0, "dcr h" },
{ 0x26, 2, inst, 0, "mvi h,%1" },
{ 0x27, 1, inst, 0, "daa" },
{ 0x28, 2, unused, 0, 0 },
{ 0x29, 1, inst, 0, "dad h" },
{ 0x2A, 3, instw, 0, "lhld %a" },
{ 0x2B, 1, inst, 0, "dcx h" },
{ 0x2C, 1, inst, 0, "inr l" },
{ 0x2D, 1, inst, 0, "dcr l" },
{ 0x2E, 2, inst, 0, "mvi l,%1" },
{ 0x2F, 1, inst, 0, "cma" },
{ 0x30, 1, inst, I85, "sim" },
{ 0x31, 3, inst, 0, "lxi sp,%2" },
{ 0x32, 3, instb, 0, "sta %a" },
{ 0x33, 1, inst, 0, "inx sp" },
{ 0x34, 1, inst, 0, "inr m" },
{ 0x35, 1, inst, 0, "dcr m" },
{ 0x36, 2, inst, 0, "mvi m,%1" },
{ 0x37, 1, inst, 0, "stc" },
{ 0x38, 2, unused, 0, 0 },
{ 0x39, 1, inst, 0, "dad sp" },
{ 0x3A, 3, instb, 0, "lda %a" },
{ 0x3B, 1, inst, 0, "dcr sp" },
{ 0x3C, 1, inst, 0, "inr a" },
{ 0x3D, 1, inst, 0, "dcr a" },
{ 0x3E, 2, inst, 0, "mvi a,%1" },
{ 0x3F, 1, inst, 0, "cmc" },
{ 0x40, 1, inst, 0, "mov b,b" },
{ 0x41, 1, inst, 0, "mov b,c" },
{ 0x42, 1, inst, 0, "mov b,d" },
{ 0x43, 1, inst, 0, "mov b,e" },
{ 0x44, 1, inst, 0, "mov b,h" },
{ 0x45, 1, inst, 0, "mov b,l" },
{ 0x46, 1, inst, 0, "mov b,m" },
{ 0x47, 1, inst, 0, "mov b,a" },
{ 0x48, 1, inst, 0, "mov c,b" },
{ 0x49, 1, inst, 0, "mov c,c" },
{ 0x4A, 1, inst, 0, "mov c,d" },
{ 0x4B, 1, inst, 0, "mov c,e" },
{ 0x4C, 1, inst, 0, "mov c,h" },
{ 0x4D, 1, inst, 0, "mov c,l" },
{ 0x4E, 1, inst, 0, "mov c,m" },
{ 0x4F, 1, inst, 0, "mov c,a" },
{ 0x50, 1, inst, 0, "mov d,b" },
{ 0x51, 1, inst, 0, "mov d,c" },
{ 0x52, 1, inst, 0, "mov d,d" },
{ 0x53, 1, inst, 0, "mov d,e" },
{ 0x54, 1, inst, 0, "mov d,h" },
{ 0x55, 1, inst, 0, "mov d,l" },
{ 0x56, 1, inst, 0, "mov d,m" },
{ 0x57, 1, inst, 0, "mov d,a" },
{ 0x58, 1, inst, 0, "mov e,b" },
{ 0x59, 1, inst, 0, "mov e,c" },
{ 0x5A, 1, inst, 0, "mov e,d" },
{ 0x5B, 1, inst, 0, "mov e,e" },
{ 0x5C, 1, inst, 0, "mov e,h" },
{ 0x5D, 1, inst, 0, "mov e,l" },
{ 0x5E, 1, inst, 0, "mov e,m" },
{ 0x5F, 1, inst, 0, "mov e,a" },
{ 0x60, 1, inst, 0, "mov h,b" },
{ 0x61, 1, inst, 0, "mov h,c" },
{ 0x62, 1, inst, 0, "mov h,d" },
{ 0x63, 1, inst, 0, "mov h,e" },
{ 0x64, 1, inst, 0, "mov h,h" },
{ 0x65, 1, inst, 0, "mov h,l" },
{ 0x66, 1, inst, 0, "mov h,m" },
{ 0x67, 1, inst, 0, "mov h,a" },
{ 0x68, 1, inst, 0, "mov l,b" },
{ 0x69, 1, inst, 0, "mov l,c" },
{ 0x6A, 1, inst, 0, "mov l,d" },
{ 0x6B, 1, inst, 0, "mov l,e" },
{ 0x6C, 1, inst, 0, "mov l,h" },
{ 0x6D, 1, inst, 0, "mov l,l" },
{ 0x6E, 1, inst, 0, "mov l,m" },
{ 0x6F, 1, inst, 0, "mov l,a" },
{ 0x70, 1, inst, 0, "mov m,b" },
{ 0x71, 1, inst, 0, "mov m,c" },
{ 0x72, 1, inst, 0, "mov m,d" },
{ 0x73, 1, inst, 0, "mov m,e" },
{ 0x74, 1, inst, 0, "mov m,h" },
{ 0x75, 1, inst, 0, "mov m,l" },
{ 0x76, 1, inst, 0, "halt" },
{ 0x77, 1, inst, 0, "mov m,a" },
{ 0x78, 1, inst, 0, "mov a,b" },
{ 0x79, 1, inst, 0, "mov a,c" },
{ 0x7A, 1, inst, 0, "mov a,d" },
{ 0x7B, 1, inst, 0, "mov a,e" },
{ 0x7C, 1, inst, 0, "mov a,h" },
{ 0x7D, 1, inst, 0, "mov a,l" },
{ 0x7E, 1, inst, 0, "mov a,m" },
{ 0x7F, 1, inst, 0, "mov a,a" },
{ 0x80, 1, inst, 0, "add b" },
{ 0x81, 1, inst, 0, "add c" },
{ 0x82, 1, inst, 0, "add d" },
{ 0x83, 1, inst, 0, "add e" },
{ 0x84, 1, inst, 0, "add h" },
{ 0x85, 1, inst, 0, "add l" },
{ 0x86, 1, inst, 0, "add m" },
{ 0x87, 1, inst, 0, "add a" },
{ 0x88, 1, inst, 0, "adc b" },
{ 0x89, 1, inst, 0, "adc c" },
{ 0x8A, 1, inst, 0, "adc d" },
{ 0x8B, 1, inst, 0, "adc e" },
{ 0x8C, 1, inst, 0, "adc h" },
{ 0x8D, 1, inst, 0, "adc l" },
{ 0x8E, 1, inst, 0, "adc m" },
{ 0x8F, 1, inst, 0, "adc a" },
{ 0x90, 1, inst, 0, "sub b" },
{ 0x91, 1, inst, 0, "sub c" },
{ 0x92, 1, inst, 0, "sub d" },
{ 0x93, 1, inst, 0, "sub e" },
{ 0x94, 1, inst, 0, "sub h" },
{ 0x95, 1, inst, 0, "sub l" },
{ 0x96, 1, inst, 0, "sub m" },
{ 0x97, 1, inst, 0, "sub a" },
{ 0x98, 1, inst, 0, "sbb b" },
{ 0x99, 1, inst, 0, "sbb c" },
{ 0x9A, 1, inst, 0, "sbb d" },
{ 0x9B, 1, inst, 0, "sbb e" },
{ 0x9C, 1, inst, 0, "sbb h" },
{ 0x9D, 1, inst, 0, "sbb l" },
{ 0x9E, 1, inst, 0, "sbb m" },
{ 0x9F, 1, inst, 0, "sbb a" },
{ 0xA0, 1, inst, 0, "ana b" },
{ 0xA1, 1, inst, 0, "ana c" },
{ 0xA2, 1, inst, 0, "ana d" },
{ 0xA3, 1, inst, 0, "ana e" },
{ 0xA4, 1, inst, 0, "ana h" },
{ 0xA5, 1, inst, 0, "ana l" },
{ 0xA6, 1, inst, 0, "ana m" },
{ 0xA7, 1, inst, 0, "ana a" },
{ 0xA8, 1, inst, 0, "xra b" },
{ 0xA9, 1, inst, 0, "xra c" },
{ 0xAA, 1, inst, 0, "xra d" },
{ 0xAB, 1, inst, 0, "xra e" },
{ 0xAC, 1, inst, 0, "xra h" },
{ 0xAD, 1, inst, 0, "xra l" },
{ 0xAE, 1, inst, 0, "xra m" },
{ 0xAF, 1, inst, 0, "xra a" },
{ 0xB0, 1, inst, 0, "ora b" },
{ 0xB1, 1, inst, 0, "ora c" },
{ 0xB2, 1, inst, 0, "ora d" },
{ 0xB3, 1, inst, 0, "ora e" },
{ 0xB4, 1, inst, 0, "ora h" },
{ 0xB5, 1, inst, 0, "ora l" },
{ 0xB6, 1, inst, 0, "ora m" },
{ 0xB7, 1, inst, 0, "ora a" },
{ 0xB8, 1, inst, 0, "cmp b" },
{ 0xB9, 1, inst, 0, "cmp c" },
{ 0xBA, 1, inst, 0, "cmp d" },
{ 0xBB, 1, inst, 0, "cmp e" },
{ 0xBC, 1, inst, 0, "cmp h" },
{ 0xBD, 1, inst, 0, "cmp l" },
{ 0xBE, 1, inst, 0, "cmp m" },
{ 0xBF, 1, inst, 0, "cmp a" },
{ 0xC0, 1, inst, 0, "rnz" },
{ 0xC1, 1, inst, 0, "pop b" },
{ 0xC2, 3, pushj, 0, "jnz %a" },
{ 0xC3, 3, jrst, 0, "jmp %a" },
{ 0xC4, 3, pushj, 0, "cnz %a" },
{ 0xC5, 1, inst, 0, "push b" },
{ 0xC6, 2, inst, 0, "adi %1" },
{ 0xC7, 1, trap, 0, "rst 0" },
{ 0xC8, 1, inst, 0, "rz" },
{ 0xC9, 1, popj, 0, "ret" },
{ 0xCA, 3, pushj, 0, "jz %a" },
{ 0xCB, 0, unused, 0, 0 },
{ 0xCC, 3, pushj, 0, "cz %a" },
{ 0xCD, 3, pushj, 0, "call %a" },
{ 0xCE, 2, inst, 0, "aci %1" },
{ 0xCF, 1, trap, 0, "rst 1" },
{ 0xD0, 1, inst, 0, "rnc" },
{ 0xD1, 1, inst, 0, "pop d" },
{ 0xD2, 3, pushj, 0, "jnc %a" },
{ 0xD3, 2, inst, 0, "out %1" },
{ 0xD4, 3, pushj, 0, "cnc %a" },
{ 0xD5, 1, inst, 0, "push d" },
{ 0xD6, 2, inst, 0, "sui %1" },
{ 0xD7, 1, trap, 0, "rst 2" },
{ 0xD8, 1, inst, 0, "rc" },
{ 0xD9, 1, unused, 0, 0 },
{ 0xDA, 3, pushj, 0, "jc %a" },
{ 0xDB, 2, inst, 0, "in %1" },
{ 0xDC, 3, pushj, 0, "cc %a" },
{ 0xDD, 0, unused, 0, 0 },
{ 0xDE, 2, inst, 0, "sbi %1" },
{ 0xDF, 1, trap, 0, "rst 3" },
{ 0xE0, 1, inst, 0, "rpo" },
{ 0xE1, 1, inst, 0, "pop h" },
{ 0xE2, 3, pushj, 0, "jpo %a" },
{ 0xE3, 1, inst, 0, "xthl" },
{ 0xE4, 3, pushj, 0, "cpo %a" },
{ 0xE5, 1, inst, 0, "push h" },
{ 0xE6, 2, inst, 0, "ani %1" },
{ 0xE7, 1, trap, 0, "rst 4" },
{ 0xE8, 1, inst, 0, "rpe" },
{ 0xE9, 1, popj, 0, "pchl" },
{ 0xEA, 3, pushj, 0, "jpe %a" },
{ 0xEB, 1, inst, 0, "xchg" },
{ 0xEC, 3, pushj, 0, "cpe %a" },
{ 0xED, 0, unused, 0, 0 },
{ 0xEE, 2, inst, 0, "xri %1" },
{ 0xEF, 1, trap, 0, "rst 5" },
{ 0xF0, 1, inst, 0, "rp" },
{ 0xF1, 1, inst, 0, "pop psw" },
{ 0xF2, 3, pushj, 0, "jp %a" },
{ 0xF3, 1, inst, 0, "di" },
{ 0xF4, 3, pushj, 0, "cp %a" },
{ 0xF5, 1, inst, 0, "push psw" },
{ 0xF6, 2, inst, 0, "ori %1" },
{ 0xF7, 1, trap, 0, "rst 6" },
{ 0xF8, 1, inst, 0, "rm" },
{ 0xF9, 1, inst, 0, "sphl" },
{ 0xFA, 3, pushj, 0, "jm %a" },
{ 0xFB, 1, inst, 0, "ei" },
{ 0xFC, 3, pushj, 0, "cm %a" },
{ 0xFD, 0, unused, 0, 0 },
{ 0xFE, 2, inst, 0, "cpi %1" },
{ 0xFF, 1, trap, 0, "rst 7" },
};
--Johnny