RTL Logic - test-drb@ccmp.vtda.org

10 Jan 2005

Hi
 Both right but it really depends on usage.
Dwight

...
 From: "der Mouse"
&lt;mouse(a)rodents.montreal.qc.ca&gt;

    Wired-OR will work fine for open-collector output TTL.
 Well, except you generally get wired-AND, because the open
 collectors are generally NPN collectors with emitters to ground, not
 PNP collectors with emitters to Vcc.  That is twice you've tried to make this
point.  If a signal is viewed
 as active low, then what is going on is logically wired-or. 
Yes...but would you call (? of) a 7408 an OR gate if it happens to be
manipulating such signals?  That's the sense in which I say it's
wired-AND: the resulting signal is what you'd get from feeding the same
logic levels (except with pullups, or non-OC outputs) into the gate
usually called an AND gate.

/~\ The ASCII				der Mouse
\ / Ribbon Campaign
 X  Against HTML	       mouse(a)rodents.montreal.qc.ca
/ \ Email!	     7D C8 61 52 5D E7 2D 39  4E F1 31 3E E8 B3 27 4B