On Wed, Jun 13, 2012 at 5:19 AM, Shoppa, Tim <tshoppa at wmata.com> wrote:
If you didn't want double-error detection it would
take 6 check bits per 32 bit word. Maybe
the implication that there is 3 check bits per 16 bit words, assumes single-bit
correction
and the actual ECC logic is working on 32 bit words. If the ECC was working on 16 bit
words,
it would take 5 check bits.
This thread got started after I put some pictures and descriptions of
the P800 cards online. Then this thread got started with Jos's
question:
"Any idea why a 16 bits system would have a 21 bit
wide semiconductor memory?"
So, the thread started with hardware that has 5 check bits. The idea
of 3 checks bits possibly being enough for ECC was introduced later,
then discredited.
Camiel