On Thu, 2 Jan 2003, Sean 'Captain Napalm' Conner wrote:
LDX
#$00
LOOP LDA $C0C1 ; Get the data at 6522 Port A (4)
AND #$08 ; Bit 4 is the RDY signal input (4)
BEQ LOOP ; Loop until it goes true (2)
WAIT LDA $C0C1 ; Now wait until it goes false (4)
AND #$08 ; (4)
BEQ WAIT ; (2)
INX ; Increment the count (2)
INC $06 ; Increment a zero page location* (6)
CPX #$50 ; 80 Index Marks yet? (4)
BNE LOOP ; No? Keeping looping (2)
First off, while I can't say this for sure on the 6502, I do know that the
6809 had two cycle counts for the various branches; one for branch taken and
one for not (although that may have been for the long branches---my
reference material is packed away somewhere), so you may be one or two
cycles off your count.
Indeed, this is the case, as I found out after I finally dug up my copy of
the 6502 opcode timings. Branches expend an extra cycle if they are
taken.
Now, going through the code:
LOOP LDA $C0C1 ; (4)
AND #$08 ; (4)
BEQ LOOP ; (2) - loop back if bit is zero
WAIT LDA $C0C1 ; (4)
AND #$08 ; (4)
BEQ WAIT ; (2) - loop back if bit is zero
Now, are you *sure* that is what you want? Your comments on LOOP make
sense---wait until the bit goes 1, but for WAIT, you say you are waiting
until it goes zero, but the code doesn't match that comment.
Sorry, typo. The BEQ in the WAIT loop should be a BNE.
That might be your problem right there.
The code was correct. My transliteration was not.
Since my 6502 reference is packed away (sigh---most
of my computer
reference is packed away) does the INX/DEX instructions affect the flags?
Yes, they do.
If so, you may be able to shave some time off:
LDX #80
LOOP LDA $C0C1 ; (4)
AND #$08 ; (4)
BEQ LOOP ; (2) (10 per loop)
WAIT LDA $C0C1 ; (4)
AND #$08 ; (4)
BNE WAIT ; (2) (10 per loop-bug fix as well?)
INC $06 ; (6)
DEX ; (2)
BNE LOOP ; (2)
Save four cycles if DEX does affect the flags.
Well, this was just test code and the timing doesn't matter too much. It
just affirmed that not all the Index Mark signals were being caught in
time (56 out of 80 was average).
Can you change the location of the status bit? If
you can make it so that
bit 7 of $C0C1 is the status bit you can save four cycles per loop:
LOOP LDA $C0C1 ; (4)
BPL LOOP ; (2) wait until status bit goes high
WAIT LDA $C0C1 ; (4)
BMI WAIT ; (2) wait for status bit to go low
Yes and no. This would indeed save cycles, but logically it would break
my decoder routine.
I've re-worked the inputs and the reader control code and now have the
Index Marks latch into CA1 (I finally got it to work reliably with a 10K
pull-up resistor). Now when I get an Index Mark I have something like
2000 cycles to read the data and reset the IM latch (there are enough
cycles to decode the data in realtime, but I'll do that after I've got it
working right).
The problem I'm having now is timing out too quickly on the first column
read of the first card. According to the M200 docs I thought I had only
a few dozen microseconds to sense the first IM but it is timing out with
an 8-bit counter set to 255 and polling the IM signal in a loop that
takes about 14 cycles (14 * 255 = ~3500 cycles).
I'm alllllllmost there...
Sellam Ismail Vintage Computer Festival
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