Hey all --
I'm one step closer to bringing my 11/40 back to life -- the front panel
is now responding and I can examine and deposit memory.
But the machine is only responsive without the Unibus terminator (an
M9302) installed. If it's installed, the front panel is basically hung
-- toggling "Start" causes a brief flurry of activity, but that's the
only thing that causes any response.
Without the terminator installed, the front panel more or less works, I
can examine and deposit memory, load the address register, etc... but I
can't get any toggled in code to run, obviously -- it traps to the bus
error vector at 00004.
I don't see why that is 'obviosu' A short Unibus will normally work with
a termination at one end only.
(There's also an odd issue, which I doubt is related, but
Examining/Depositing does not correctly increment the address --
starting from 0, it's "0, 2, 6, 12, 16, 22, 26..." and if I start at 1
it's "1, 3, 7, 13, 17, 23, 27...")
I think you should look at that too. It is clearly storing the '4's bit
correctly, since it does take account of it in future increments. THis
looks like a bus buffer problem, but you want to find out.
I currently have the CPU boards + MMU option installed in the correct
order with a SLU card in the SPC slot, and an M981 connecting to a
4-slot Unibus backplane with a single 64K MOS memory card (M7891) in
slot 2 -- all other slots have grant continuity cards installed. The
Unibus terminator is installed in the last slot.
Any ideas?
Normally when a system hanges if you had an M9302 terminator, it's a
grant problem (as I've mentioned before, if a grant actually gets to the
M9302, that card assets SACK, causing the CPU (or more precisely the
arbiter) to deassert the grant line. If the 'grant' is due to a signal
floating because of an open grant chain, the CPU can't deassrt the grant
line _at the terminator_, and the system hangs with SACK asserted).
Anyway, you mention you've got grant continuity cards in all the empty
slots. I assume the're in the right connector (D), and the right way
round :-). In which case, check the NPG jumpers on your backplane
(wirewrapped links from pin CA1 to CB1).
What I normally do is use a logic probe to see just which grant is
getting to the terminator. Then make sure it's not being asserted by the
CPU (there could be a fault in the CPU, a dead buffer or something), and
then check it along tbe backplane to find out whrre it's starting from.
-tony