3 Dec
2018
3 Dec
'18
7:02 a.m.
https://www.asc.ohio-state.edu/dunlap.3/humor/instruction.set.html
ERS Erase Read-only Storage
FPT Fire Photon Torpedoes
GCAR Get Correct Answer Regardless
XIO Execute Invalid Op code
Among others!
-----
3 Dec
3 Dec
8:20 a.m.
On Mon, Dec 03, 2018 at 07:02:18AM -0500, Paul Birkel via cctech wrote:
HCF is listed there but the original instruction on the 6800
was thought to be included by the designers for hardware testing.
See:
http://www.liquisearch.com/halt_and_catch_fire/in_modern_cpus/motorola_6800
- Diane
--
- db at FreeBSD.org db at db.net http://artemis.db.net/~db
3:04 p.m.
On Mon, Dec 3, 2018 at 4:02 AM Paul Birkel via cctech <cctech at classiccmp.org>
wrote:
https://www.asc.ohio-state.edu/dunlap.3/humor/instruction.set.html
Among others!
SHON Simulate HONeywell CPU [permanent NO-OP]
I am guessing that this is a reference to the Honeywell 6000/DPS8 NOP
instruction which (curiously) can alter memory, page fault, tally runout
fault (IIRC) and loop infinitely (actually till the 16 millisecond
instruction timer causes a timeout fault).
-- Charles
--
X-Clacks-Overhead: GNU Terry Pratchett
5:01 p.m.
In the early 1970s I remember seeing similer things for the PDP-10 and PDP-15.
On Mon Dec 3 07:02:18 2018 cctech at classiccmp.org (Paul Birkel via cctech) wrote:
https://www.asc.ohio-state.edu/dunlap.3/humor/instruction.set.html
ERS Erase Read-only Storage
FPT Fire Photon Torpedoes
GCAR Get Correct Answer Regardless
XIO Execute Invalid Op code
Among others!
-----
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charles.unix.pro＠gmail.com -
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dstalk＠execulink.com -
pbirkel＠gmail.com