Dave, Charles and Folks --
Let me share what little I do know in case you haven't
seen this yet. IBM makes very little reference to
these systems. System/36 is mentioned on their
corporate history page. It's a direct ancestor of the
AS/400 series. The only specific information they have
comes from their sales manual.
* Search:
http://www.ibmlink.ibm.com/ussman&parms=
Our models are described this way (cribbed from above)
:
5360 Multiple workstation system with
multiprogramming capability.
o 30 - 1432MB HDD
o 128K - 7Mb RAM
o 8 inch 1.2MB diskette
o 36 - 72 local workstations
5362 System unit
o 256K - 2MB RAM
o 30 - 660MB HDD
o 8 inch 1.2MB diskette
o 28 local workstations
o 64 remote workstations
5363 System/36 and Application Systems/Entry
System Unit Compact, low-cost, floor-standing
system that runs existing System/36
application programs without recompilation.
o 1.0 - 2.0Mb RAM
o 5.25 1.2Mb diskette
o 65 - 1256Mb HDD
o 28 local worstations
o 64 remote worstations
5364 S/36 PC is a combination of the 5364 System
Unit and a directly-attached IBM PC. The
5364 System Unit is a smaller, lower cost,
floor standing or desk-top system that will
run existing S/36 application programs
without recompilation. The personal computer
can run personal computer programs as well as
act as the first S/36 workstation.
o 256K - 1.0MB RAM
o 5.25 inch 1.2Mb diskette
o 40, 65, 80 or 130MB HDD
o 6-9 local workstations (later
upgraded to 16)
The 5360 family has a multiple processor
architecture. The main storage processor is an
enhanced S/34 instruction processor. A control
storage processor operates in parallel with
the main storage processor, and provides
microcoded control function for the
I/O processors and interfaces. The processors use
LSI (Large Scale Integration) for the logic
circuitry. Storage technology is MOSFET
(Metal Oxide semiconductor Field Effect
Transistor). Data and instructions are stored
as EBCDIC characters. Each EBCDIC character
is stored in an 8-bit byte. ECC (Error
Correction Code) is maintained in main storage.
Single-bit error correction and double-bit error
detection is performed on every two bytes.
Parity is added for all data transfers to
and from main storage.
Now you know all I know. Help! Anything else would be
greatly appreciated.
Thanks,
Colin Eby
Senior Consultant
CSC Consulting
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