<at all and will rely on USB, SCSI, and the various parallel port protocols <to do "practical" I/O. That will be very limiting. I don't know what folk If I had to rely on those I'd be cooked. <will do in cases where they have measurements, telememtry, process control <tasks, or whatever to do. The PC has never been particularly well suited <for such tasks, since there were such meager offerings in the way of genera <purpose I/O. I think you need to hit the catalogs. GPIB and IO cards for process control are quite common. I know I run a bank of ovens with a PC (AD and GP-io card, DOS even) and a test fixture for resistive elements using GPIB and Keithley instruments. <legacy of 8080 signals and signal timing, even though the system usually ha <a sensible processor which could have worked very well, there tended to be <glitches as caused by the fact that it took maybe three signals and a <decoder to sense a local I/O cycle, yet the bus provided six or seven, and there in was the S100 problem... <>Like a z280? <> <You must really love that chip, Allison, but yes, even that, if you wish. <It's YOUR computer, after all, so it should be the way YOU like it. Exactly. The reason, it run native z80 and as a result CP/M. Not many cpus left you can hack the hardware and software on. Next toy, Z800x! <I personally would favor the 96-pin connector (per DIN 41612) as used in <VME, but only one, for a basic card and make it on the nominally 4.5 x 6" <form factor of the single slot EUROCARDS (e.g. VME). That connector is mor <reliable than card-edge connectors and it's used enough that it's relativel <cheap. It's compatible with a 0.100" matrix so a card and a backplane coul I happen to like the connector as well as you don't need an etched board for proto with a etched edge connector. The board size propsed is too small. S100 was about right for protos, save for the lost space to the regulators and extra bus interface components. <This is where I'd recommend caution if you use q-bus. The schematics must <not only be available and complete, but they must be correct as well. PAL <must be fully characterized, something I've never seen in a DEC product, True good engineering too. However the info some of which you refer to is burried in contracts to DEC vendors. <and, in fact, I'd say you have MUCH less "open" information about q-bus tha <about ISA. The problem with ISA is that the information was usually "out Sorry, no. DEC in the handbooks provide full data, timing, and sample schematics for qbus interfaces. Same for Omnibus Unibus. In that area they likely were more open to people having their own boards. They made it easy enough with books WW cards and WWfoundation cards with basic bus interface (DMA capable) already there. ISA, I don't have any similar concise reference for bus timing other than a few simple published circuits. I've ahd to extrapolate from the XT and 8088 (and supporting chips) knowledge to get things like timing and protocal for at least the ISA 8bit. Now, open in the DEC case does not mean you can sell board commercially using their bus technology without permission. It does mean whats inside is no secret and for internal use (labs or one off boards) there are few if any restrictions. FYI: companies like Bridgeport, heath and others used this with DEC permission not to mention the raft or board makers for analog, and digital IO for specialized applications. <In reality, building an I/O mux onto a current generation PC parallel port <makes as much sense as anything. With EPP you can get up to 2MB of transfe <bandwidth, in bursts, of course. That's not bad . . . AND you have a "real <computer with "real" tools that's very fast and "real" cheap. It's one way to go. I use that is it's there. also building a parallel IO card is a trivial task as there are more designs (all the same or terminally similar) out there for copying. It takes nothing to make a 16bit output and 16bit input board using the vector foundation board. Allison