From: woodelf <bfranchuk at jetnet.ab.ca>
dwight elvey wrote:
Right now, we are at the power density limits for
uP's. We can
build smaller ones and put more circuits on a chip but we've
hit the limits of power density. We get smaller improvements
from lower K insulation on wiring but power is now the wall.
Dwight
Does this mean that if we reduce the number of transistors
we can go faster? Let see a PDP 8/Z(1) with current technology
would be? :) I think the problem is computer design rather
than the chip design -- You don't have random access memory
any more & salesmen push clock speed rather than a usefull
measure of computing power.
No, it means that you need to be more clever with the transistors
that are there. The architectures of today's CPU's are doing several
times as much per clock cycle than your PDP8 did.
The problem is that they are also running out of tricks in a single
CPU. That is why your seeing multi processors becoming more
popular.
I'm not sure where the future methods will go but they are still
holding to Moore's law, just not with increased clock speed as
the driving force any more.
Dwight
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