HOTZE wrote: Not a bad idea at all. This is something I have been tinkering with for quite some time (about 20 years!). At that time, I was a student and my university tutor had worked on the DEUCE machine (similar to Turings ACE) [These machines are admissible here arn't they? ;-)] The main memory of the DEUCE was built form mercury delay lines of 1024 bits, and the 1024 bit shift register chip had just become available. The connection was obvious and we spent hours discussing the rebuilding a TTL version of DEUCE, for which he still had the logic diagrams. Alas the project was never completed but I have dreams of doing it one day. I see this as more than just an academic project, rebuilding these old machines in current technology is really the only way in which they can be preserved and made available for study, excepting perhaps via emulators (another of my passions). Take the idea even further : the technology exists today to build most if not all first generations machines on a single chip. Indeed I wonder if an FPGA might not be able to be reconfigurable to build many of these early machines, certainly a few FPGA's together with the new programmable routiing chips (from GateWay?) should do the job. Thus we can build on hardware base capable of emulating or recreating many of the early machines, just add software. There is obviously a fine line between this and doing an emulator on a modern machine but I think both are equally valuable to presevre the intellectual ideas behind theose early machines. I'm not usually so eloquent, but you touch one of my hot spots with this idea, Thanks, -- Hans B. Pufal : <mailto:hansp@digiweb.com> Comprehensive Computer Catalogue : <http://www.digiweb.com/~hansp/ccc/> _-_-__-___--_-____-_--_-_-____--_---_-_---_--__--_--_--____---_--_--__--_