Excellent news! I had to go hunt up your original message: http://www.classiccmp.org/pipermail/cctalk/2015-January/002879.html to refresh my memory as to exactly what a 'J1' was! It was interesting to re-read your original message; I and a couple of other people are looking into doing a QBUS card to provide access to modern non-volatile storage (SD cards, USB thumb drives), and in discussing the internal design, we'd planned on an FPGA, and a separate micro-controller. Your concept to have the 'micro-controller' _in_ the FPGA is interesting! The only problem, from our point of view, is the 'limited' number of FPGA pins (the QBUS interface alone is ~50 pins) - at least, without going to a BGA part, which we view as undesirable. I'm curious as to your reasoning in doing a custom simulator (OK, it's all fun :-). I do understand having _a_ simulator (writing all the software involved on the card will be much easier if you don't have to deal with a flaky/new hardware), but since the J1 is in the FPGA, couldn't you just use the FPGA simulator? Or is it too slow to emulate a good-sized J1 program? Noel PS: When we get down to detailed design, we'll have to get the specs on your light panel interface; we'd like to be able to drive the same light panel (for exactly the same uses :-), to avoid re-building the wheel.