Date: Thu, 24 Apr 2008 15:47:39 -0500
From: Jules Richardson
Hmm, maybe the designers were sensible, and any
critical timings are
solely on the device response side - i.e. the host can take as long as it
wants to process things, but the device must respond within a certain time
period (and then just happily sits there until the host acknowledges).
QIC-02 is buffered via drive-local RAM, so it's not really fussy on
the host-side timing. These tapes are streamers, however, so you
I was refering to critical timing between the hardware control lines. For
example I've used an interface (not QIC anything) where one device
asserted a signal, then the other device had to acknowldedge within a
certian (short) time (1us or so), otherwise there would be ig problems.
AFAIK on QIC02, one device asserts a signal, then waits of the other
device to acknowledge by asserting one of its signals, and so on. And
that wait can be as long as you like. Which means both sides can, IIRC,
be done in software/firmware with no problems
Oh, Chuck has both QIC-36 and QIC-02 ISA inteface
boards. He just
wants the convenience of not dealing with buggy NetBSD drivers (the
Linux QIC-02 drivers don't work at all anymore) and not having to
look for spare DMA and IRQs for the boards. A QIC-02 host interface
board is scarcely more complicated than an IDE interface. OTOH, a
QIC-36 interface is usually a full-length board, packed with a data
separator, CPU, RAM and other logic. From the CPU side, both appear
as pretty much the same thing.
The QIC36 ISA card I have in my junk box appaers to be essentially a
QIC-02 host interfaxce and a QIC-02-to QIC36 bridge on the same PCB. I
keep it because the ASICs on the board are the same as those on a
separate QIC-02 to QIC36 bridge that I sometimes use with my PERQ, and
thus the ISA card is a source of spares...
-tony