Lee Davison wrote: This is all a tempest in a teacup. In computer architecture classes, one of the things that is stressed quickly is to separate the consideration of architecture from implementation. The 68000 family was clearly a 32b architecture. Yes, a few instructions fell short of that, but 95% of it was 32b. Implementation is another matter. From where I sit, I wouldn't hesitate to call a 68008 a 32b processor, as the bus interface affects speed, not function. If I took a 68020 and clocked it slowly enough, it would look a whole lot like a 68008 from outside of the computer cabinet. In fact, the 68020 allows for dynamic bus sizing; by controlling a couple pins appropriately, you can also make it use only 8b of the data bus. Does that really affect how you view the machine? Not really; it just is slower.

That's exactly what I was going to say. Because the ALU is 16 bits and the data bus is 16 bit the optimal word size for handling small integers and pointer offsets is 16 bits. When you get to the 68020 the optimal word size for small integers and pointer offsets is 32 bits. When you need to do things fast, the difference is very significant. The 68000 (and the 68010) are 16 bit processors that happen to have 32 bit register groups. The same way the Z80 is an 8 bit processor that happens to have 16 bit register groups and the Z8000 is a 16 bit processor that happens to have 32 bit register groups. The primary difference is that Motorola decided not to make the high word independently addressable which make it look less kludgy. Somehow people are turning this statement into some sort of praise for intel's architecture. It's not. Intel's segmentation scheme on the 8086 and 80286 sucks. But just because the 80286 sucks and it's a 16 bit processor, that doesn't turn the 68000 into a 32 bit processor. It's just a better 16 bit processor. Eric