From: "Eric Smith" <eric at
brouhaha.com>
Whether DMA is required or not has nothing to do with
which member of
the 177x/179x/279x/MB88xx family you use. It's determined by whether
you can write tight enough transfer loops to avoid write underruns and
read overruns.
More or less what I was trying to say (however clumsily).
On either processor, unrolling the loop does not shave
off enough cycles
to get to the 8" double density transfer rate.
For more conversation on transfer loop speeds, see my comments on
Herb Johnson's Retrotechnology site. By getting clever with code,
you can turn in some pretty fast transfer loops even on a lowly 2 MHz
8080.
For example, if we assume that the controller will assert wait states
if an input is attempted on the data port until a byte becomes
available and interrupts on operation complete, a 2MHz 8080 transfer
loop could handle an 8" MFM transfer like this:
LXI H,floppy$byte
floppy$byte: clocks 2mhz
IN fdcport ;FDC port 10 5 uS
PUSH PSW ;store 2 bytes 11 5.5 uS
PCHL ;loop 5 2.5 uS
Total: 26 13 uS
Now, of course, you've got to unravel what you've got on the stack to
get your data back, but you've gotten it--at 2MHz and on an 8080 yet.
Caveat: I haven't tried this, except on paper. If you were to unroll
the loop to a series of IN/PUSH pairs, the byte time should drop to
10.5 usec, more than fast enough for an 8" MFM transfer.
But that discussion's from the days when silicon was expensive. An
inexpensive async FIFO would get rid of the problem entirely and
allow for transfer at one's convenience.
The point that I was trying to make was that the 1770/2/3 make for
very easy interfacing with a minimum of parts--and are very easy to
program. They feature a small package and were designed for
5.25"/3.5" drives. Were I prototyping a small PCB with a Z80 and
floppy support, they'd be my first choice.
Cheers,
Chuck