Seems pacbell don't like my mail server (funny, just about everyone else does). Anyway, the questions Jim asked are probably ones that other folks want to know the answers to, so I'll post them here instead... Jim Battle wrote: Well the idea is that you have the 40-pin connector, and make up an adapter cable for whatever drive you want to handle, then tell the software that (say) output 1 needs to be high when track_number > 46, or whatever you need. these signals would have a wirewrap header where one could wire them to +5, gnd, or perhaps to I/O pins on the FPGA under software control. Again, 50-pin cable to adapter board, which plugs into the FDR and converts the signals to suit the drive. *points at subject line* Read/write. sector 0. This would imply some means of counting the sector holes, or at least a way in the data stream of saying: wait until sector 0, data, data, ..., data, wait until next sector marker, data, data, ..., data, etc, stop. Would you believe I've thought of that? :) The writing side of things is controlled by a small microsequencer (think 'special purpose CPU'). The instructions it can handle are: - Timer Load N - wait N clock periods, then write a flux transition - STOP - stop processing further instructions and halt the machine - Set Write Gate State - enable/disable the write amplifier - Wait for hard-sector index mark - Wait for N index pulses So typically you'd do this: WAIT_TRACKMARK ; sector 0 - wait for track start marker WRITE_GATE_ON TIMER_LOAD 123 TIMER_LOAD 42 ... WRITE_GATE_OFF WAIT_INDEX ; sector 1 WRITE_GATE_ON .. more write commands .. WRITE_GATE_OFF STOP Thanks, -- Phil. | (\_/) This is Bunny. Copy and paste Bunny classiccmp at philpem.me.uk | (='.'=) into your signature to help him gain http://www.philpem.me.uk/ | (")_(") world domination.