-----Original Message-----
From: Allison J Parent <allisonp(a)world.std.com
To: Discussion re-collecting of classic computers
<classiccmp(a)u.washington.edu
Date: Tuesday, March
30, 1999 5:05 PM
Subject: Re: Rebirth of IMSAI
<It was always somewhat of a nuissance dealing with
the Z-80 because of the
<way it presented its interrupt acknowledge, which was a combined I/O and M
<cycle, as long as the I/O cycle, but with M1. That meant, in my case, tha
All instuction fetch cycles were short, INTA cycle had an extry cycle added
for interrupt resolution in the supporting chips.
To get around the short M1 cycles I'd use a tiny bit of logit to stutter
the clock to the chip (slip a cycle) for M1 only. This results it running
generally faster and still using slower memory.
This would require a variable length or variable preset counter sourcing the
clock. The problem was knowing when it was going the generate an M1 cycle
in advance, since the instructions were, generally of different clock cycle
counts. Either that or you'd have to look for the clock edge after the
appearance of the M1 strobe and KNOW it wasn't part of the interrupt
acknowledge. Neither was thrifty with logic, nor was it fun.
I've done lots of clock fiddling with various processors, and I admit from
the get-go, that the Z-80 was the least fun in this respect. It had so many
timing requirements that, once you varied from the beaten path, you were
going to use too many parts. Why would one want to replicate the bus timing
state machine just to improve it a bit? The reason for using a Z-80 was
that you could use CP/M for your development environment. I even had a
scheme wherein I took my target system and connected its processor to my CPU
socket via a cable or other arrangement, just so I could use CP/M. If it
hadn't been for that one, I'd never have put a Z-80 in anything. 6801's had
more features and required less hardware, and their clock was symmetrical so
you could share memory if that was desirable. It's a real pain with the
Z-80. That's true of the 8085 as well. I always preferred the 6502 and
68xx parts for useful work. Unfortunately they didn't have the support of
really useful OS. (well, . . . maybe on the Apple, but I never got much use
out of them until I put in a Z-80 card.)
<This same protocol made it unwise to try to use
memory mapped I/O, since
the
<cycle length of an I/O cycle differed from that of
a memory cycle.
I used to do it all the time and like I posted earlier the NS* disk system
used
MM-IO very effectively.
I had one friend whose NorthStar convinced me
every time I saw it, that I
didn't want one. We were using CP/M, and you really didn't have even one
byte to spare in your measly 64K. His NorthStar only had 48K of memory
space, for some reason. Maybe it was because they'd mapped that region for
I/O.
>Allison