FPGA VAX update, now DIY TTL computers - test-drb@ccmp.vtda.org

9 Nov 2005

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Subject: Re: FPGA VAX update, now DIY TTL computers
   From: "Chuck Guzis" <cclist at sydex.com>
   Date: Wed, 09 Nov 2005 09:37:02 -0800
     To: cctalk at classiccmp.org

On 11/9/2005 at 11:49 AM Allison wrote:

 True for later generations.  However CDC6000 was
more specialized 
packaging where the PDP6 was a whole lot of flipchips and limited 
specialized packaging. 
Automated wire-wrapping is less expensive than other methods, but doesn't
give one the leve of control that other methods afford. 
depends on what your trying to control. Costs would be one dimension. ;)

...
 It now seems incredible on what amounts to a 10 MHz
mainframe, but wire
length was a big part of the CDC 6600 design puzzle.  I recall a friend
telling me that his first assignment on his job at CDC was to take Cray's
6600 prototype and measure each coil of twisted pair to which had been
attached a tag that said "tune" in preparation for actually manufacturing
the thing. 
Not to confuse propagation delay with with clock rate.  It's important
as any of those delays could be critical path.  However areas like ALU
and memory were often the bottleneck.

...
  The old 6000-series taper-pin backplanes were a deep
maze of wiring
hanging here and there and the nanosecond-per-foot rule was an important
part of the 6600 design.  CDC continued to use taper-pin style backplanes
long after other firms were using machine-wrapped backplanes, mostly, I
suspect because of the ability to optimize propogation delays--and still
retain the use of standardized "cordwood" logic modules.

Cheers,
Chuck 
Every manufacturer seems to have their own favorite technology for 
packaging and interconnecting.  Even for packaging there are more 
generations that appeared.  Another example was DCC D112 a TTL 
PDP-8 but with a very differnt form factor and packaging.  It 
however was not the first. I think it was CDC160(I should check)
that helped to start that many years before.

Allison