Subject: Re: Floppy controller questions
From: "Dwight K. Elvey" <dwight.elvey at amd.com>
Date: Wed, 24 Aug 2005 14:11:36 -0700 (PDT)
To: cctalk at
classiccmp.org
From: "Allison" <ajp166 at
bellatlantic.net>
---snip---
ugly 8080 flavor for transfers up to 1KB:
; HL is memory pointer
; A is temp
; B is transfer length *4
; Zero flag affected by DCR B
DMAIO: IN DMAport ; wait if DMA is not asserted
mov M,A
INX H ; HL<-HL+1
IN DMAport ; wait if DMA is not asserted
mov M,A
INX H ; HL<-HL+1
IN DMAport ; wait if DMA is not asserted
mov M,A
INX H ; HL<-HL+1
IN DMAport ; wait if DMA is not asserted
mov M,A
INX H ; HL<-HL+1
DCR B ; B is dmatransfer down counter
JNZ DMAIO ; loop if not Zero, more to go.
...
Hi
As I recall, you could move the DCR B before the last
IN DMAport. As I recall, INX H didn't effect the zero
flag ( or was that the carry flag ? ). In any case,
This kept the last time shorter.
Dwight
Makes no difference in action. From the last IN DMAport
you have average 16uS to do whatever and get to the next
IN DMAport. Delay too long and you have a data overrun.
The INX H does not affect the flags the flags on 8080/8085/z80.
The DCR B does affect the zero flag.
It takes 10cycles to do the jump, 7 to not jump.
Z80 DJNZ is faster by 6 cycles as it would eliminate the
DCR B and also does the jump in 8 cycles. The only difference
is C would be your data counter.
None of this really helps of the CPU is 8088 or 6502.
Allison