Tony wrote...
Yes, modern SRAM is fast enough. But that's
'easy' in theory. Firstly you
have to have some way of switching the SRAM between the device and the
loader
Dual port SRAM is one answer. Or, I'm not sure what the power on test
in
microcode does on the MX's, but my guess is it doesn't touch the add-on
microcode. The loader roms probably aren't touched either until called from
the front panel. If the RPL stuff is turned on, it may though. I think the
RPL stuff may have a built in delay cycle, and the EEprom to SRAM copy would
be done by then. My initial guess is that upon powerup, the device would
copy from NVRAM or EEprom to SRAM, then switch the SRAM to be available to
the host. I would think this process would be awfully fast.
(or use dual-port SRAM, which is darn expensive if
it's fast).
Expensive is better than not ever having any blank old-style proms
:)
Secondly, you need to halt the device while the SRAM
is loaded.
I would envision the SRAM load to only happen once, during power up. One
could build in a reset button and dip bank switch or micro rotary switch
that would make it load different contents, but it would be up to the
operator not to do that while the system was running.
Neither problem is difficult, but the second probably
involves some
modifications to the device (if only to the reset circuit), and the
daughterboard ceases to be a 1 or 2 chips.
Chip count would be highly desireable to
keep to a minimum. I don't know how
this would apply to non-HP systems, but on the HP boxes there's another
approach. On the E series for example, there are four 14pin sockets in very
close proximity on the cpu board for loader roms. One could build a single
larger daughtercard that would plug into all 4 four loader rom sockets
simultaneously. You would have more real estate on the daughterboard to use,
plus, perhaps you could get "economies of scale" by having one SRAM service
the four rom data at once.
Just some uninformed thoughts on my part :)
Jay
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