> The 6509 is a 6502 core with address extension
registers (I think one
> used for direct addresses, another for indirect addresses) allowing the
> chip to access 1Mbyte of memory.
Hmm, why would the 6509 have more address space than a
6510? Or is
that "extension registers" the same as the "port" zero-page address
that is used in the C=64 to change the memory ROM/RAM layout?
Not quite. In the 6510 the registers at $0000/1 (and all 6510 derivatives,
including the 7501, 8500, 8501 and 8502, used in the 264 series, the 64C,
later 264s and the 128 series respectively), are merely an I/O port that
happens to be hooked up to memory banking logic (as well as the Datasette
port). Only a couple of those bits are actually used for ROM enable.
On the 6509, there are four extra address lines, giving you up to 1MB.
These lines are set by location $0000 for execution (which 64K "bank" the
code is running from) and by location $0001 for indirection (i.e., on
indirect indexed LDAs and STAs *only* the four bits in $01 would be
asserted on the address lines to get at another bank). Not quite segment
and offset addressing. :-)
I have some sample code at
... look under "What's a 6509, Anyway?"
----------------------------- personal page: http://www.armory.com/~spectre/
Cameron Kaiser, Point Loma Nazarene University * ckaiser(a)stockholm.ptloma.edu
-- Never blame on malice what can be blamed on abject idiocy. -----------------