The Z80 core is about three times the size of the 650x core and really can't do anything the 650x core can't do quite a bit faster. If you clock the two cores at the same rate, the smaller core is perhaps 5x as fast. It's small because it's simple, having fewer resources. For a dedicated task, however, the small controller's the better choice because it holds down the requirement for resources. Gate arrays are not relevant to the typical microcontroller application. The gate arrays are handy when an MCU is not fast enough, but for short runs, where the MCU's shine, the FPGA's and CPLD's are much slower to develop. The single-chip examples I think about when I'm considering what to use are frequently the Scenix SX family. They're as fast as a core in an FPGA, and, in fact, probably faster, and they cost a LOT less. Of course you have to be able to make the tasks fit, but at the 10 MIPS rate, if you can partition the task, perhaps pipelining two or more of the devices, they still can get the job done VERY fast, yet at a fraction of the cost of a dedicated logic device. Moreover, if you can design with pipelining and manage to devise a scheme wherein multiple devices can make the job happen, it's still MUCH less work than an FPGA. Dick ----- Original Message ----- From: ajp166 <ajp166(a)bellatlantic.net> To: <classiccmp(a)classiccmp.org> Sent: Thursday, November 02, 2000 8:01 PM Subject: Re: Monitor for iSBC 8024